dsmlib.c

VxWorks BSP框架源代码包含头文件和驱动

        0xf6, 0x20, 0x00, 0x00,    /* opcode */
        0xfe, 0x38, 0x00, 0x00},   /* mask */

    {"NEG", itNeg, OP1|WFUL|MODRM, 0,
        0xf6, 0x18, 0x00, 0x00,    /* opcode */
        0xfe, 0x38, 0x00, 0x00},   /* mask */

    {"NOT", itNot, OP1|WFUL|MODRM, 0,
        0xf6, 0x10, 0x00, 0x00,    /* opcode */
        0xfe, 0x38, 0x00, 0x00},   /* mask */

    {"TEST", itTestIanRM, OP1|WFUL|MODRM|IMM, 0,
        0xf6, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x38, 0x00, 0x00},   /* mask */

    /* 9 bits mask */

    {"ADC", itAdcItoRM, OP1|SEXT|WFUL|MODRM|IMM, 0,
        0x80, 0x10, 0x00, 0x00,    /* opcode */
        0xfc, 0x38, 0x00, 0x00},   /* mask */

    {"ADD", itAddItoRM, OP1|SEXT|WFUL|MODRM|IMM, 0,
        0x80, 0x00, 0x00, 0x00,    /* opcode */
        0xfc, 0x38, 0x00, 0x00},   /* mask */

    {"AND", itAndItoRM, OP1|SEXT|WFUL|MODRM|IMM, 0,
        0x80, 0x20, 0x00, 0x00,    /* opcode */
        0xfc, 0x38, 0x00, 0x00},   /* mask */

    {"CMP", itCmpIwiRM, OP1|SEXT|WFUL|MODRM|IMM, 0,
        0x80, 0x38, 0x00, 0x00,    /* opcode */
        0xfc, 0x38, 0x00, 0x00},   /* mask */

    {"OR", itOrItoRM, OP1|SEXT|WFUL|MODRM|IMM, 0,
        0x80, 0x08, 0x00, 0x00,    /* opcode */
        0xfc, 0x38, 0x00, 0x00},   /* mask */

    {"SBB", itSbbIfrRM, OP1|SEXT|WFUL|MODRM|IMM, 0,
        0x80, 0x18, 0x00, 0x00,    /* opcode */
        0xfc, 0x38, 0x00, 0x00},   /* mask */

    {"SUB", itSubIfrRM, OP1|SEXT|WFUL|MODRM|IMM, 0,
        0x80, 0x28, 0x00, 0x00,    /* opcode */
        0xfc, 0x38, 0x00, 0x00},   /* mask */

    {"FADD", itFaddIRM, OP1|MF|MODRM, 0,
    ESC|0x00, 0x00, 0x00, 0x00,    /* opcode */
        0xf9, 0x38, 0x00, 0x00},   /* mask */

    {"FCOM", itFcomIRM, OP1|MF|MODRM, 0,
    ESC|0x00, 0x10, 0x00, 0x00,    /* opcode */
        0xf9, 0x38, 0x00, 0x00},   /* mask */

    {"FCOMP", itFcompIRM, OP1|MF|MODRM, 0,
    ESC|0x00, 0x18, 0x00, 0x00,    /* opcode */
        0xf9, 0x38, 0x00, 0x00},   /* mask */

    {"FLD", itFldIRM, OP1|MF|MODRM, 0,
    ESC|0x01, 0x00, 0x00, 0x00,    /* opcode */
        0xf9, 0x38, 0x00, 0x00},   /* mask */

    {"FMUL", itFmulIRM, OP1|MF|MODRM, 0,
    ESC|0x00, 0x08, 0x00, 0x00,    /* opcode */
        0xf9, 0x38, 0x00, 0x00},   /* mask */

    {"FST", itFstIRM, OP1|MF|MODRM, 0,
    ESC|0x01, 0x10, 0x00, 0x00,    /* opcode */
        0xf9, 0x38, 0x00, 0x00},   /* mask */

    {"FSTP", itFstpIRM, OP1|MF|MODRM, 0,
    ESC|0x01, 0x18, 0x00, 0x00,    /* opcode */
        0xf9, 0x38, 0x00, 0x00},   /* mask */

    {"XOR", itXorItoRM, OP1|SEXT|WFUL|MODRM|IMM, 0,
        0x80, 0x30, 0x00, 0x00,    /* opcode */
        0xfc, 0x38, 0x00, 0x00},   /* mask */

    /* 8 bits mask */

    {"AAA", itAaa, OP1, 0,
        0x37, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"AAS", itAas, OP1, 0,
        0x3f, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"ARPL", itArpl, OP1|MODRM|REG, 0,
        0x63, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"ASIZE", itAsize, OP1, 0,
        0x67, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"BOUND", itBound, OP1|MODRM|REG, 0,
        0x62, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CALL", itCallSeg, OP1|OFFSEL, 0,
        0x9a, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CALL", itCall, OP1|DIS, 0,
        0xe8, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CBW", itCbw, OP1, 0,
        0x98, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CLC", itClc, OP1, 0,
        0xf8, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CLD", itCld, OP1, 0,
        0xfc, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CLI", itCli, OP1, 0,
        0xfa, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CMC", itCmc, OP1, 0,
        0xf5, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CS", itCs, OP1, 0,
        0x2e, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"CWD", itCwd, OP1, 0,
        0x99, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"DAA", itDaa, OP1, 0,
        0x27, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"DAS", itDas, OP1, 0,
        0x2f, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"DS", itDs, OP1, 0,
        0x3e, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"ENTER", itEnter, OP1|D16L8, 0,
        0xc8, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"ES", itEs, OP1, 0,
        0x26, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"FDIV", itFdivIRM, OP1|MF|MODRM, 0,
    ESC|0x00, 0x30, 0x00, 0x00,    /* opcode */
        0xf9, 0x30, 0x00, 0x00},   /* mask */

    {"FS", itFs, OP1, 0,
        0x64, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"FSUB", itFsubIRM, OP1|MF|MODRM, 0,
    ESC|0x00, 0x20, 0x00, 0x00,    /* opcode */
        0xf9, 0x30, 0x00, 0x00},   /* mask */

    {"GS", itGs, OP1, 0,
        0x65, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"HLT", itHlt, OP1, 0,
        0xf4, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"INT", itInt3, OP1, 0,
        0xcc, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"INT", itInt, OP1|I8, 0,
        0xcd, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"INTO", itInto, OP1, 0,
        0xce, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"IRET", itIret, OP1, 0,
        0xcf, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"JECXZ", itJcxz, OP1|D8, 0,
        0xe3, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"JMP", itJmpD, OP1|DIS, 0,
        0xe9, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"JMP", itJmpSeg, OP1|OFFSEL, 0,
        0xea, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"JMP", itJmpS, OP1|D8, 0,
        0xeb, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LAHF", itLahf, OP1, 0,
        0x9f, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LDS", itLds, OP1|MODRM|REG, 0,
        0xc5, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LEA", itLea, OP1|MODRM|REG, 0,
        0x8d, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LEAVE", itLeave, OP1, 0,
        0xc9, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LES", itLes, OP1|MODRM|REG, 0,
        0xc4, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LOCK", itLock, OP1, 0,
        0xf0, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LOOP", itLoop, OP1|D8, 0,
        0xe2, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LOOPNZ", itLoopnz, OP1|D8, 0,
        0xe0, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"LOOPZ", itLoopz, OP1|D8, 0,
        0xe1, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"NOP", itNop, OP1, 0,
        0x90, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"OSIZE", itOsize, OP1, 0,
        0x66, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"POPA", itPopa, OP1, 0,
        0x61, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"POPF", itPopf, OP1, 0,
        0x9d, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"PUSHA", itPusha, OP1, 0,
        0x60, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"PUSHF", itPushf, OP1, 0,
        0x9c, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"REP", itRep, OP1, 0,
        0xf3, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"REPNE", itRepNe, OP1, 0,
        0xf2, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"RET", itRetI, OP1|D16, 0,
        0xc2, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"RET", itRet, OP1, 0,
        0xc3, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"RET", itRetSeg, OP1, 0,
        0xcb, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"RET", itRetSegI, OP1|D16, 0,
        0xca, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"SAHF", itSahf, OP1, 0,
        0x9e, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"SS", itSs, OP1, 0,
        0x36, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"STC", itStc, OP1, 0,
        0xf9, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"STD", itStd, OP1, 0,
        0xfd, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"STI", itSti, OP1, 0,
        0xfb, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"WAIT", itWait, OP1, 0,
        0x9b, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    {"XLAT", itXlat, OP1|WFUL, 0,
        0xd7, 0x00, 0x00, 0x00,    /* opcode */
        0xff, 0x00, 0x00, 0x00},   /* mask */

    /* 7 bits mask */

    {"ADC", itAdcItoA, SF|WFUL|IMM|AX, 0,
        0x14, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"ADD", itAddItoA, SF|WFUL|IMM|AX, 0,
        0x04, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"AND", itAndItoA, SF|WFUL|IMM|AX, 0,
        0x24, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"CMP", itCmpIwiA, SF|WFUL|IMM|AX, 0,
        0x3c, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"CMPS", itCmps, OP1|WFUL, 0,
        0xa6, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"IMUL", itImulRMwiI, OP1|SEXT|MODRM|REG|IMM, 0,
        0x69, 0x00, 0x00, 0x00,    /* opcode */
        0xfd, 0x00, 0x00, 0x00},   /* mask */

    {"IN", itInF, OP1|WFUL|PORT|I8|AX, 0,
        0xe4, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"IN", itInV, OP1|WFUL|AX, 0,
        0xec, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"INS", itIns, OP1|WFUL, 0,
        0x6c, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"LODS", itLods, OP1|WFUL, 0,
        0xac, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"MOV", itMovRMtoS, OP1|DISR|MODRM|SREG3, 0,
        0x8c, 0x00, 0x00, 0x00,    /* opcode */
        0xfd, 0x00, 0x00, 0x00},   /* mask */

    {"MOVS", itMovs, OP1|WFUL, 0,
        0xa4, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"OR", itOrItoA, SF|WFUL|IMM|AX, 0,
        0x0c, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"OUT", itOutF, OP1|WFUL|PORT|I8|AX, 0,
        0xe6, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"OUT", itOutV, OP1|WFUL|AX, 0,
        0xee, 0x00, 0x00, 0x00,    /* opcode */
        0xfe, 0x00, 0x00, 0x00},   /* mask */

    {"OUTS", itOuts, OP1|WFUL, 0,
        0x6e, 0x00, 0x00, 0x00,    /* opcode */