dsmlib.c

VxWorks BSP框架源代码包含头文件和驱动

    {"movn.s", COP1B(0,19), COP1TMSK, fd_fs_rt, CPU_MIPS4},
    {"movn.d", COP1B(1,19), COP1TMSK, fd_fs_rt, CPU_MIPS4},

    {"recip.s", COP1B(0,21), COP1BMSK, fd_fs, CPU_MIPS4},
    {"recip.d", COP1B(1,21), COP1BMSK, fd_fs, CPU_MIPS4},

    {"rsqrt.s", COP1B(0,22), COP1BMSK, fd_fs, CPU_MIPS4},
    {"rsqrt.d", COP1B(1,22), COP1BMSK, fd_fs, CPU_MIPS4},

    /*"cvt.s.s",	COP1B(0,32),	COP1BMSK, fd_fs,*/
    {"cvt.s.d",	COP1B(1,32),	COP1BMSK, fd_fs},
    {"cvt.s.e",	COP1B(2,32),	COP1BMSK, fd_fs},
    {"cvt.s.q",	COP1B(3,32),	COP1BMSK, fd_fs},
    {"cvt.s.w",	COP1B(4,32),	COP1BMSK, fd_fs},
    {"cvt.s.l",	COP1B(5,32),	COP1BMSK, fd_fs},

    {"cvt.d.s",	COP1B(0,33),	COP1BMSK, fd_fs},
    /*"cvt.d.d",	COP1B(1,33),	COP1BMSK, fd_fs,*/
    {"cvt.d.e",	COP1B(2,33),	COP1BMSK, fd_fs},
    {"cvt.d.q",	COP1B(3,33),	COP1BMSK, fd_fs},
    {"cvt.d.w",	COP1B(4,33),	COP1BMSK, fd_fs},
    {"cvt.d.l",	COP1B(5,33),	COP1BMSK, fd_fs},

    {"cvt.e.s",	COP1B(0,34),	COP1BMSK, fd_fs},
    {"cvt.e.d",	COP1B(1,34),	COP1BMSK, fd_fs},
    /*"cvt.e.e",	COP1B(2,34),	COP1BMSK, fd_fs,*/
    {"cvt.e.q",	COP1B(3,34),	COP1BMSK, fd_fs},
    {"cvt.e.w",	COP1B(4,34),	COP1BMSK, fd_fs},
    {"cvt.e.l",	COP1B(5,34),	COP1BMSK, fd_fs},

    {"cvt.q.s",	COP1B(0,35),	COP1BMSK, fd_fs},
    {"cvt.q.d",	COP1B(1,35),	COP1BMSK, fd_fs},
    {"cvt.q.e",	COP1B(2,35),	COP1BMSK, fd_fs},
    /*"cvt.q.q",	COP1B(3,35),	COP1BMSK, fd_fs,*/
    {"cvt.q.w",	COP1B(4,35),	COP1BMSK, fd_fs},
    {"cvt.q.l",	COP1B(5,35),	COP1BMSK, fd_fs},

    {"cvt.w.s",	COP1B(0,36),	COP1BMSK, fd_fs},
    {"cvt.w.d",	COP1B(1,36),	COP1BMSK, fd_fs},
    {"cvt.w.e",	COP1B(2,36),	COP1BMSK, fd_fs},
    {"cvt.w.q",	COP1B(3,36),	COP1BMSK, fd_fs},
    /*"cvt.w.w",	COP1B(4,36),	COP1BMSK, fd_fs,*/
    /*"cvt.w.l",	COP1B(5,36),	COP1BMSK, fd_fs,*/

    {"cvt.l.s",	COP1B(0,37),	COP1BMSK, fd_fs},
    {"cvt.l.d",	COP1B(1,37),	COP1BMSK, fd_fs},
    {"cvt.l.e",	COP1B(2,37),	COP1BMSK, fd_fs},
    {"cvt.l.q",	COP1B(3,37),	COP1BMSK, fd_fs},
    /*"cvt.l.w",	COP1B(4,37),	COP1BMSK, fd_fs,*/
    /*"cvt.l.l",	COP1B(5,37),	COP1BMSK, fd_fs,*/


				/* MIPS IV Compare Instructions */

    {"c.f.s",	COP1B(0,48),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.f.s",	COP1B(0,48),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.f.d",	COP1B(1,48),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.f.e",	COP1B(2,48),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.f.q",	COP1B(3,48),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.f.w",	COP1B(4,48),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.f.l",	COP1B(5,48),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.un.s",	COP1B(0,49),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.un.d",	COP1B(1,49),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.un.e",	COP1B(2,49),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.un.q",	COP1B(3,49),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.un.w",	COP1B(4,49),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.un.l",	COP1B(5,49),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.eq.s",	COP1B(0,50),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.eq.d",	COP1B(1,50),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.eq.e",	COP1B(2,50),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.eq.q",	COP1B(3,50),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.eq.w",	COP1B(4,50),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.eq.l",	COP1B(5,50),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.ueq.s", COP1B(0,51),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ueq.d", COP1B(1,51),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ueq.e", COP1B(2,51),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ueq.q", COP1B(3,51),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ueq.w", COP1B(4,51),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ueq.l", COP1B(5,51),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.olt.s",	COP1B(0,52),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.olt.d",	COP1B(1,52),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.olt.e",	COP1B(2,52),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.olt.q",	COP1B(3,52),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.olt.w",	COP1B(4,52),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.olt.l",	COP1B(5,52),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.ult.s",	COP1B(0,53),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ult.d",	COP1B(1,53),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ult.e",	COP1B(2,53),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ult.q",	COP1B(3,53),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ult.w",	COP1B(4,53),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ult.l",	COP1B(5,53),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.ole.s",	COP1B(0,54),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ole.d",	COP1B(1,54),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ole.e",	COP1B(2,54),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ole.q",	COP1B(3,54),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ole.w",	COP1B(4,54),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ole.l",	COP1B(5,54),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.ule.s",	COP1B(0,55),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ule.d",	COP1B(1,55),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ule.e",	COP1B(2,55),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ule.q",	COP1B(3,55),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ule.w",	COP1B(4,55),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ule.l",	COP1B(5,55),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.sf.s",	COP1B(0,56),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.sf.d",	COP1B(1,56),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.sf.e",	COP1B(2,56),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.sf.q",	COP1B(3,56),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.sf.w",	COP1B(4,56),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.sf.l",	COP1B(5,56),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.ngle.s",	COP1B(0,57),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngle.d",	COP1B(1,57),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngle.e",	COP1B(2,57),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngle.q",	COP1B(3,57),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngle.w",	COP1B(4,57),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngle.l",	COP1B(5,57),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.seq.s",	COP1B(0,58),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.seq.d",	COP1B(1,58),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.seq.e",	COP1B(2,58),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.seq.q",	COP1B(3,58),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.seq.w",	COP1B(4,58),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.seq.l",	COP1B(5,58),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.ngl.s",	COP1B(0,59),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngl.d",	COP1B(1,59),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngl.e",	COP1B(2,59),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngl.q",	COP1B(3,59),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngl.w",	COP1B(4,59),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngl.l",	COP1B(5,59),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.lt.s",	COP1B(0,60),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.lt.d",	COP1B(1,60),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.lt.e",	COP1B(2,60),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.lt.q",	COP1B(3,60),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.lt.w",	COP1B(4,60),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.lt.l",	COP1B(5,60),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.nge.s",	COP1B(0,61),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.nge.d",	COP1B(1,61),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.nge.e",	COP1B(2,61),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.nge.q",	COP1B(3,61),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.nge.w",	COP1B(4,61),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.nge.l",	COP1B(5,61),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.le.s",	COP1B(0,62),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.le.d",	COP1B(1,62),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.le.e",	COP1B(2,62),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.le.q",	COP1B(3,62),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.le.w",	COP1B(4,62),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.le.l",	COP1B(5,62),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

    {"c.ngt.s",	COP1B(0,63),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngt.d",	COP1B(1,63),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngt.e",	COP1B(2,63),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngt.q",	COP1B(3,63),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngt.w",	COP1B(4,63),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},
    {"c.ngt.l",	COP1B(5,63),	COP1CMPMSK_MIPS4, w_fs_ft, CPU_MIPS4},

				/* MIPS III Compare Instructions */

    {"c.f.s",	COP1B(0,48),	COP1CMPMSK, fs_ft},
    {"c.f.s",	COP1B(0,48),	COP1CMPMSK, fs_ft},
    {"c.f.d",	COP1B(1,48),	COP1CMPMSK, fs_ft},
    {"c.f.e",	COP1B(2,48),	COP1CMPMSK, fs_ft},
    {"c.f.q",	COP1B(3,48),	COP1CMPMSK, fs_ft},
    {"c.f.w",	COP1B(4,48),	COP1CMPMSK, fs_ft},
    {"c.f.l",	COP1B(5,48),	COP1CMPMSK, fs_ft},

    {"c.un.s",	COP1B(0,49),	COP1CMPMSK, fs_ft},
    {"c.un.d",	COP1B(1,49),	COP1CMPMSK, fs_ft},
    {"c.un.e",	COP1B(2,49),	COP1CMPMSK, fs_ft},
    {"c.un.q",	COP1B(3,49),	COP1CMPMSK, fs_ft},
    {"c.un.w",	COP1B(4,49),	COP1CMPMSK, fs_ft},
    {"c.un.l",	COP1B(5,49),	COP1CMPMSK, fs_ft},

    {"c.eq.s",	COP1B(0,50),	COP1CMPMSK, fs_ft},
    {"c.eq.d",	COP1B(1,50),	COP1CMPMSK, fs_ft},
    {"c.eq.e",	COP1B(2,50),	COP1CMPMSK, fs_ft},
    {"c.eq.q",	COP1B(3,50),	COP1CMPMSK, fs_ft},
    {"c.eq.w",	COP1B(4,50),	COP1CMPMSK, fs_ft},
    {"c.eq.l",	COP1B(5,50),	COP1CMPMSK, fs_ft},

    {"c.ueq.s", COP1B(0,51),	COP1CMPMSK, fs_ft},
    {"c.ueq.d", COP1B(1,51),	COP1CMPMSK, fs_ft},
    {"c.ueq.e", COP1B(2,51),	COP1CMPMSK, fs_ft},
    {"c.ueq.q", COP1B(3,51),	COP1CMPMSK, fs_ft},
    {"c.ueq.w", COP1B(4,51),	COP1CMPMSK, fs_ft},
    {"c.ueq.l", COP1B(5,51),	COP1CMPMSK, fs_ft},

    {"c.olt.s",	COP1B(0,52),	COP1CMPMSK, fs_ft},
    {"c.olt.d",	COP1B(1,52),	COP1CMPMSK, fs_ft},
    {"c.olt.e",	COP1B(2,52),	COP1CMPMSK, fs_ft},
    {"c.olt.q",	COP1B(3,52),	COP1CMPMSK, fs_ft},
    {"c.olt.w",	COP1B(4,52),	COP1CMPMSK, fs_ft},
    {"c.olt.l",	COP1B(5,52),	COP1CMPMSK, fs_ft},

    {"c.ult.s",	COP1B(0,53),	COP1CMPMSK, fs_ft},
    {"c.ult.d",	COP1B(1,53),	COP1CMPMSK, fs_ft},
    {"c.ult.e",	COP1B(2,53),	COP1CMPMSK, fs_ft},
    {"c.ult.q",	COP1B(3,53),	COP1CMPMSK, fs_ft},
    {"c.ult.w",	COP1B(4,53),	COP1CMPMSK, fs_ft},
    {"c.ult.l",	COP1B(5,53),	COP1CMPMSK, fs_ft},

    {"c.ole.s",	COP1B(0,54),	COP1CMPMSK, fs_ft},
    {"c.ole.d",	COP1B(1,54),	COP1CMPMSK, fs_ft},
    {"c.ole.e",	COP1B(2,54),	COP1CMPMSK, fs_ft},
    {"c.ole.q",	COP1B(3,54),	COP1CMPMSK, fs_ft},
    {"c.ole.w",	COP1B(4,54),	COP1CMPMSK, fs_ft},
    {"c.ole.l",	COP1B(5,54),	COP1CMPMSK, fs_ft},

    {"c.ule.s",	COP1B(0,55),	COP1CMPMSK, fs_ft},
    {"c.ule.d",	COP1B(1,55),	COP1CMPMSK, fs_ft},
    {"c.ule.e",	COP1B(2,55),	COP1CMPMSK, fs_ft},
    {"c.ule.q",	COP1B(3,55),	COP1CMPMSK, fs_ft},
    {"c.ule.w",	COP1B(4,55),	COP1CMPMSK, fs_ft},
    {"c.ule.l",	COP1B(5,55),	COP1CMPMSK, fs_ft},

    {"c.sf.s",	COP1B(0,56),	COP1CMPMSK, fs_ft},
    {"c.sf.d",	COP1B(1,56),	COP1CMPMSK, fs_ft},
    {"c.sf.e",	COP1B(2,56),	COP1CMPMSK, fs_ft},
    {"c.sf.q",	COP1B(3,56),	COP1CMPMSK, fs_ft},
    {"c.sf.w",	COP1B(4,56),	COP1CMPMSK, fs_ft},
    {"c.sf.l",	COP1B(5,56),	COP1CMPMSK, fs_ft},

    {"c.ngle.s",	COP1B(0,57),	COP1CMPMSK, fs_ft},
    {"c.ngle.d",	COP1B(1,57),	COP1CMPMSK, fs_ft},
    {"c.ngle.e",	COP1B(2,57),	COP1CMPMSK, fs_ft},
    {"c.ngle.q",	COP1B(3,57),	COP1CMPMSK, fs_ft},
    {"c.ngle.w",	COP1B(4,57),	COP1CMPMSK, fs_ft},
    {"c.ngle.l",	COP1B(5,57),	COP1CMPMSK, fs_ft},

    {"c.seq.s",	COP1B(0,58),	COP1CMPMSK, fs_ft},
    {"c.seq.d",	COP1B(1,58),	COP1CMPMSK, fs_ft},
    {"c.seq.e",	COP1B(2,58),	COP1CMPMSK, fs_ft},
    {"c.seq.q",	COP1B(3,58),	COP1CMPMSK, fs_ft},
    {"c.seq.w",	COP1B(4,58),	COP1CMPMSK, fs_ft},
    {"c.seq.l",	COP1B(5,58),	COP1CMPMSK, fs_ft},

    {"c.ngl.s",	COP1B(0,59),	COP1CMPMSK, fs_ft},
    {"c.ngl.d",	COP1B(1,59),	COP1CMPMSK, fs_ft},
    {"c.ngl.e",	COP1B(2,59),	COP1CMPMSK, fs_ft},
    {"c.ngl.q",	COP1B(3,59),	COP1CMPMSK, fs_ft},
    {"c.ngl.w",	COP1B(4,59),	COP1CMPMSK, fs_ft},
    {"c.ngl.l",	COP1B(5,59),	COP1CMPMSK, fs_ft},

    {"c.lt.s",	COP1B(0,60),	COP1CMPMSK, fs_ft},
    {"c.lt.d",	COP1B(1,60),	COP1CMPMSK, fs_ft},
    {"c.lt.e",	COP1B(2,60),	COP1CMPMSK, fs_ft},
    {"c.lt.q",	COP1B(3,60),	COP1CMPMSK, fs_ft},
    {"c.lt.w",	COP1B(4,60),	COP1CMPMSK, fs_ft},
    {"c.lt.l",	COP1B(5,60),	COP1CMPMSK, fs_ft},

    {"c.nge.s",	COP1B(0,61),	COP1CMPMSK, fs_ft},
    {"c.nge.d",	COP1B(1,61),	COP1CMPMSK, fs_ft},
    {"c.nge.e",	COP1B(2,61),	COP1CMPMSK, fs_ft},
    {"c.nge.q",	COP1B(3,61),	COP1CMPMSK, fs_ft},
    {"c.nge.w",	COP1B(4,61),	COP1CMPMSK, fs_ft},
    {"c.nge.l",	COP1B(5,61),	COP1CMPMSK, fs_ft},

    {"c.le.s",	COP1B(0,62),	COP1CMPMSK, fs_ft},
    {"c.le.d",	COP1B(1,62),	COP1CMPMSK, fs_ft},
    {"c.le.e",	COP1B(2,62),	COP1CMPMSK, fs_ft},
    {"c.le.q",	COP1B(3,62),	COP1CMPMSK, fs_ft},
    {"c.le.w",	COP1B(4,62),	COP1CMPMSK, fs_ft},
    {"c.le.l",	COP1B(5,62),	COP1CMPMSK, fs_ft},

    {"c.ngt.s",	COP1B(0,63),	COP1CMPMSK, fs_ft},
    {"c.ngt.d",	COP1B(1,63),	COP1CMPMSK, fs_ft},
    {"c.ngt.e",	COP1B(2,63),	COP1CMPMSK, fs_ft},
    {"c.ngt.q",	COP1B(3,63),	COP1CMPMSK, fs_ft},
    {"c.ngt.w",	COP1B(4,63),	COP1CMPMSK, fs_ft},
    {"c.ngt.l",	COP1B(5,63),	COP1CMPMSK, fs_ft},

    /* General Purpose RTYPE (Special) */

    {"nop",	RTYPE(0,0,0,0), RMASK(0x1f,0x1f,0x1f,0x7ff), null},
    {"ssnop",	RTYPE(0,0,0,0x40), RMASK(0x1f,0x1f,0x1f,0x7ff), null},
    {"sll",	RTYPE(0,0,0,0), RMASK(0,0,0,0x3f), rd_rt_s},
    {"selsr",	RTYPE(0,0,0,1), RMASK(0,0,0,0x7ff), rd_rs_rt, CPU_CW4011},
    {"movf",    RTYPE(0,0,0,1), RMASK(0,0x3,0,0x7ff), rd_rs_d, CPU_MIPS4},
    {"reserved",RTYPE(0,0,0,1), RMASK(0,0,0,0x3f), null},
    {"srl",	RTYPE(0,0,0,2), RMASK(0x1f,0,0,0x3f), rd_rt_s},
    {"sra",	RTYPE(0,0,0,3), RMASK(0x1f,0,0,0x3f), rd_rt_s},
    {"sllv",	RTYPE(0,0,0,4), RMASK(0,0,0,0x7ff), rd_rt_rs},
    {"selsl",	RTYPE(0,0,0,5), RMASK(0,0,0,0x7ff), rd_rs_rt, CPU_CW4011},
    {"reserved",RTYPE(0,0,0,5), RMASK(0,0,0,0x3f), null},
    {"srlv",	RTYPE(0,0,0,6), RMASK(0,0,0,0x7ff), rd_rt_rs},
    {"srav",	RTYPE(0,0,0,7), RMASK(0,0,0,0x7ff), rd_rt_rs},
    {"jr",	RTYPE(0,0,0,8), RMASK(0,0x1f,0x1f,0x7ff), rs},
    {"jalr",	RTYPE(0,0,0x1f,9), RMASK(0,0x1f,0x1f,0x7ff), rs},
    {"jalr",	RTYPE(0,0,0,9), RMASK(0,0x1f,0,0x7ff), rd_rs},
    {"ffs",	RTYPE(0,0,0,10), RMASK(0,0x1f,0,0x7ff), rd_rs, CPU_CW4011},
    {"movz",    RTYPE(0,0,0,10), RMASK(0,0,0,0x7ff), rd_rs_rt, CPU_MIPS4}, 
    {"reserved",RTYPE(0,0,0,10), RMASK(0,0,0,0x3f), null},
    {"ffc",	RTYPE(0,0,0,11), RMASK(0,0x1f,0,0x7ff), rd_rs, CPU_CW4011},
    {"movn",	RTYPE(0,0,0,11), RMASK(0,0,0,0x7ff), rd_rs_rt, CPU_MIPS4},    
    {"reserved",RTYPE(0,0,0,11), RMASK(0,0,0,0x3f), null},
    {"syscall",	RTYPE(0,0,0,12), RMASK(0,0,0,0x3f), S},
    {"break",	RTYPE(0,0,0,13), RMASK(0,0,0,0x3f), B},
    {"sdbbp",	RTYPE(0,0,0,14), RMASK(0,0,0,0x3f), null},
    {"sync",	RTYPE(0,0,0,15), RMASK(0x1f,0x1f,0x1f,0x7ff), null},