cachesh7622lib.c

VxWorks BSP框架源代码包含头文件和驱动

	}
   
    return OK;
    }


/*******************************************************************************
*
* cacheSh7622Invalidate - invalidate some or all entries from SH7622 cache
*
* This routine invalidates some or all entries from SH7622 cache.
*
* RETURNS: OK, or ERROR if the cache type is invalid or the cache control
* is not supported.
*
* NOMANUAL
*/

LOCAL STATUS cacheSh7622Invalidate
    (
    CACHE_TYPE cache,
    void *     from,		/* address to clear */
    size_t     bytes
    )
    {
    if (bytes == ENTIRE_CACHE)
	{
	UINT32 ccr = cacheSh7622CCRGet ();

	if ((ccr & (C_WRITE_BACK | C_WRITE_THROUGH)) == C_WRITE_THROUGH)
	    {
	    cacheSh7622CFlush ();
	    return OK;
	    }
	}

    return cacheSh7622Clear (cache, from, bytes);
    }

/******************************************************************************
*
* cacheSh7622Clear - clear all or some entries from a SH7622 cache
*
* This routine flushes and invalidates all or some entries of the specified
* SH7622 cache.
*
* RETURNS: OK, or ERROR if the cache type is invalid or the cache control
* is not supported.
*
* NOMANUAL
*/

LOCAL STATUS cacheSh7622Clear
    (
    CACHE_TYPE cache,
    void *     from,		/* address to clear */
    size_t     bytes
    )
    {
    UINT32 p = (UINT32)from;
    UINT32 ix;
    UINT32 c_size = CAC_DATA_SIZE;			/* cache size */
    int way;

    if (p >= SH7622_CACHE_THRU && p <= (SH7622_CACHE_THRU | SH7622_PHYS_MASK))
	return ERROR;					/* non-cacheable region */

    if (bytes == 0)
	{
	return OK;
	}
    else if (bytes == ENTIRE_CACHE)
	{
	for (way = 0; way <= 3; way++)
	    {
	    for (ix = 0; ix <= 0x7f0; ix += CAC_LINE_SIZE)
		{
		UINT32 *pt = (UINT32 *)(CAC_ADRS_ARRAY | (way << 12) | ix);

		cacheSh7622MFlush (pt, -1, 0, 0);
		}
	    }
	}
    else
	{
	UINT32 ca_begin = p & ~(CAC_LINE_SIZE - 1);
	UINT32 ca_end   = p + bytes - 1;

	if (bytes < c_size) /* do associative purge */
	    {
	    cacheSh7622AFlush (ca_begin, ca_end);
	    }
	else /* check every cache tag */
	    {
	    for (way = 0; way <= 3; way++)
		{
		for (ix = 0; ix <= 0x7f0; ix += CAC_LINE_SIZE)
		    {
		    UINT32 *pt = (UINT32 *)(CAC_ADRS_ARRAY | (way << 12) | ix);

		    cacheSh7622MFlush (pt, ix, ca_begin, ca_end);
		    }
		}
	    }
	}

    return OK;
    }

/*******************************************************************************
*
* cacheSh7622DmaMalloc - allocate a cache-safe buffer
*
* This routine attempts to return a pointer to a section of memory that will
* not experience cache coherency problems.  This routine is only called when
* MMU support is available for cache control.
*
* RETURNS: A pointer to a cache-safe buffer, or NULL.
*
* NOMANUAL
*/

LOCAL void *cacheSh7622DmaMalloc
    (
    size_t bytes
    )
    {
    void *pBuf;
    int alignment = _CACHE_ALIGN_SIZE;

    /* adjust bytes to a multiple of cache line length */

    bytes = bytes / alignment * alignment + alignment;

    /* use memalign() to avoid sharing a cache-line with other buffers */

    if ((pBuf = memalign (alignment, bytes)) == NULL)
	return NULL;

    return (void *)((UINT32)pBuf | SH7622_CACHE_THRU); 
    }

/*******************************************************************************
*
* cacheSh7622DmaFree - free the buffer acquired by cacheSh7622DmaMalloc()
*
* This routine returns to the free memory pool a block of memory previously
* allocated with cacheSh7622DmaMalloc().  The buffer is marked cacheable.
*
* RETURNS: OK, or ERROR if cacheSh7622DmaMalloc() cannot be undone.
*
* NOMANUAL
*/

LOCAL STATUS cacheSh7622DmaFree
    (
    void *pBuf
    )
    {
    UINT32 t = (UINT32)pBuf;

    if (t < SH7622_CACHE_THRU || t > (SH7622_CACHE_THRU | MAX_CACHEABLE_ADRS))
	return ERROR;

    free ((void *)(t & MAX_CACHEABLE_ADRS));

    return OK;
    }

#undef CACHE_DEBUG
#ifdef CACHE_DEBUG


LOCAL int partition (UINT32 a[][5], int l, int r)
    {
    int i, j, pivot;
    UINT32 t;

    i = l - 1;
    j = r;
    pivot = a[r][0];
    for (;;)
	{
	while (a[++i][0] < pivot)
	    ;
	while (i < --j && pivot < a[j][0])
	    ;
	if (i >= j)
	    break;
	t = a[i][0]; a[i][0] = a[j][0]; a[j][0] = t;
	t = a[i][1]; a[i][1] = a[j][1]; a[j][1] = t;
	t = a[i][2]; a[i][2] = a[j][2]; a[j][2] = t;
	t = a[i][3]; a[i][3] = a[j][3]; a[j][3] = t;
	t = a[i][4]; a[i][4] = a[j][4]; a[j][4] = t;
	}
    t = a[i][0]; a[i][0] = a[r][0]; a[r][0] = t;
    t = a[i][1]; a[i][1] = a[r][1]; a[r][1] = t;
    t = a[i][2]; a[i][2] = a[r][2]; a[r][2] = t;
    t = a[i][3]; a[i][3] = a[r][3]; a[r][3] = t;
    t = a[i][4]; a[i][4] = a[r][4]; a[r][4] = t;
    return i;
    }

LOCAL void quick_sort_1 (UINT32 a[][5], int l, int r)
    {
    int v;

    if (l >= r)
	return;

    v = partition (a, l, r);

    quick_sort_1 (a, l, v - 1);		/* sort left partial array */

    quick_sort_1 (a, v + 1, r);		/* sort right partial array */
    }

LOCAL void quick_sort (UINT32 a[][5], int n)
    {
    quick_sort_1 (a, 0, n - 1);
    }

#include "stdio.h"

/*******************************************************************************
 *
 * cacheSh7622Dump - dump SH7622 cache
 *
 * This function dumps the memory associated to the cache in P4 area.
 * For debug purpose only.
 *
 * RETUNRS: N/A
 *
 * NOMANUAL
 */

void cacheSh7622Dump (void)
    {
    UINT32 a[512][5];		/* (256-entry * 4-way) * (tag[1] + data[4]) */
    int ent, i;
    int way;

    for (ent = 0; ent < 128; ent++)
	{
	int way;

	for (way = 0; way <= 3; way++)
	    {
	    UINT32 tagAddr;

	    i = (ent * 4 + way);

	    /* Get Address Array from zone P4 */

	    /* addr field */
	    tagAddr = *(UINT32 *)(CAC_ADRS_ARRAY |
				  (way << 12) | (ent << 4));
	    a[i][0] = (tagAddr & 0xfffffff3);
	    
	    /* data field */
	    a[i][1] = *(UINT32 *)(CAC_DATA_ARRAY |
				  (way << 12) | (ent << 4) | (0 << 2));
	    a[i][2] = *(UINT32 *)(CAC_DATA_ARRAY |
				  (way << 12) | (ent << 4) | (1 << 2));
	    a[i][3] = *(UINT32 *)(CAC_DATA_ARRAY |
				  (way << 12) | (ent << 4) | (2 << 2));
	    a[i][4] = *(UINT32 *)(CAC_DATA_ARRAY |
				  (way << 12) | (ent << 4) | (3 << 2));
	    }
	}

    quick_sort (a, 512);
    
    for (way = 0; way <=3; way++)
    	{
    	printf("\nway 0x%04x:\n\n",way);
    	for (i = 128*way; i < 128*(way+1); i++)
    	    {
	    printf ("0x%08x: %08x %08x %08x %08x  %s %s\n",
		    a[i][0] & 0x1ffffff0, a[i][1], a[i][2], a[i][3], a[i][4],
		    a[i][0] & CAC_V ? "V+" : "V-",
		    a[i][0] & CAC_U ? "U+" : "U-");
	    }
	}

    }

void cacheSh7622FlushAllTest (void)
    {
    UINT32 ccr;
    int key = intLock ();				/* LOCK INTERRUPTS */

    ccr = cacheSh7622CCRGet ();	    	/* save ccr */
  
    printf("\n Cache Control Register: 0x%8x\n",cacheSh7622CCRGet() );

    cacheSh7622Clear (INSTRUCTION_CACHE,0, ENTIRE_CACHE);

    cacheSh7622Dump ();
    
    printf("\n Cache Control Register: 0x%08x\n",cacheSh7622CCRGet() );

    printf("\n Cache Control Register: 0x%08x\n",cacheSh7622CCRGet() );

    /*cacheSh7622CCRSet (ccr);	    	/@ restore ccr */

    intUnlock (key);				/* UNLOCK INTERRUPTS */
    }

void cacheSh7622FlushTest()
  {
  int way;
  int ix;
  
  for (way = 0; way <= 3; way++)
    {
    for (ix = 0; ix <= 0x7f0; ix += CAC_LINE_SIZE)
      {
      UINT32 *pt = (UINT32 *)(CAC_ADRS_ARRAY | (way << 12) | ix);
      
      cacheSh7622MFlush (pt, -1, 0, 0);
      }
    }
  }

void cacheSh7622ClearTest (int addr, int bytes)
    {
    UINT32 ccr = cacheSh7622CCRGet ();	    	/* save ccr */

    cacheSh7622CCRSet (ccr & ~C_ENABLE);   	/* disable caching */

    cacheSh7622Invalidate (INSTRUCTION_CACHE, (void *)addr, bytes);

    cacheSh7622Dump ();

    cacheSh7622CCRSet (ccr);			/* RESTORE CCR */
    }

void cacheSh7622ClearTestAll ()
    {
    cacheSh7622ClearTest (0, ENTIRE_CACHE);
    }

#endif /* CACHE_DEBUG */