lpc177x_8x_emc.c

NXPl788上lwip的无操作系统移植,基于Embest开发板

/**********************************************************************
* $Id$		lpc177x_8x_emc.c			2011-06-02
*//**
* @file		lpc177x_8x_emc.c
* @brief	Contains all functions support for EMC firmware library
*			on LPC177x_8x
* @version	1.0
* @date		02. June. 2011
* @author	NXP MCU SW Application Team
* 
* Copyright(C) 2011, NXP Semiconductor
* All rights reserved.
*
***********************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors'
* relevant copyright in the software, without fee, provided that it
* is used in conjunction with NXP Semiconductors microcontrollers.  This
* copyright, permission, and disclaimer notice must appear in all copies of
* this code.
**********************************************************************/
#ifdef __BUILD_WITH_EXAMPLE__
#include "lpc177x_8x_libcfg.h"
#else
#include "lpc177x_8x_libcfg_default.h"
#endif /* __BUILD_WITH_EXAMPLE__ */
#ifdef _EMC

#include "lpc177x_8x_emc.h"
#include "lpc177x_8x_clkpwr.h"
#include "lpc177x_8x_pinsel.h"

/* Peripheral group ----------------------------------------------------------- */
/** @addtogroup EMC
 * @{
 */
 
/** @defgroup EMC_Public_Functions
 * @{
 */

/*********************************************************************
 * @brief        Calculate refresh timer (the multiple of 16 CCLKs)
 * @param[in]    freq - frequency of EMC Clk
 * @param[in]    time - micro second
 * @return       None
 **********************************************************************/
uint32_t EMC_SDRAM_REFRESH(uint32_t time)
{
    uint32_t emc_freq = CLKPWR_GetCLK(CLKPWR_CLKTYPE_EMC);
    return (((uint64_t)((uint64_t)time * emc_freq)/16000000ull)+1);
}
/*********************************************************************
 * @brief        Calculate EMC Clock from nano second
 * @param[in]    time - nano second
 * @return       None
 **********************************************************************/
uint32_t EMC_NS2CLK(uint32_t time){
    uint32_t emc_freq = CLKPWR_GetCLK(CLKPWR_CLKTYPE_EMC);
    return (((uint64_t)time*emc_freq/1000000000ull));
}

/*********************************************************************
 * @brief        Power on EMC Block
 * @param[in]    None
 * @return       None
 **********************************************************************/
EMC_FUNC_CODE EMC_PwrOn(void)
{
    // If CPU clock is > 80 MHz, then divide it by two to create the EMC clock
    if(CLKPWR_GetCLK(CLKPWR_CLKTYPE_CPU) > 80000000) {
        CLKPWR_SetCLKDiv(CLKPWR_CLKTYPE_EMC, 1); // CPU clock / 2
    } else {
        CLKPWR_SetCLKDiv(CLKPWR_CLKTYPE_EMC, 0); // Same clock as CPU
    }

    // Power on
    CLKPWR_ConfigPPWR(CLKPWR_PCONP_PCEMC, ENABLE);

    // Enable
    LPC_EMC->Control = EMC_Control_E;

    return EMC_FUNC_OK;
}
/*********************************************************************//**
 * @brief         Initialize external dynamic memory
 * @param[in]    pConfig    Configuration
 * @return         EMC_FUNC_OK/EMC_FUNC_INVALID_PARAM/EMC_FUNC_ERR
 **********************************************************************/
EMC_FUNC_CODE DynMem_Init(EMC_DYN_MEM_Config_Type* pConfig)
{
     uint32_t i = 0;
     EMC_FUNC_CODE ret = EMC_FUNC_OK;

    /* Pin configuration:
    * P2.16 - /EMC_CAS
    * P2.17 - /EMC_RAS
    * P2.18 - EMC_CLK[0]
    * P2.19 - EMC_CLK[1]
    *
    * P2.20 - EMC_DYCS0
    * P2.21 - EMC_DYCS1
    * P2.22 - EMC_DYCS2
    * P2.23 - EMC_DYCS3
    *
    * P2.24 - EMC_CKE0
    * P2.25 - EMC_CKE1
    * P2.26 - EMC_CKE2
    * P2.27 - EMC_CKE3
    *
    * P2.28 - EMC_DQM0
    * P2.29 - EMC_DQM1
    * P2.30 - EMC_DQM2
    * P2.31 - EMC_DQM3
    *
    * P3.0-P3.31 - EMC_D[0-31]
    * P4.0-P4.23 - EMC_A[0-23]
    * P5.0-P5.1  - EMC_A[24-25]
    *
    * P4.25 - EMC_WE
    */
    PINSEL_ConfigPin(2,16,1);
    PINSEL_ConfigPin(2,17,1);
    PINSEL_ConfigPin(2,18,1);
    PINSEL_ConfigPin(2,19,1);
    PINSEL_ConfigPin(2,20,1);
    PINSEL_ConfigPin(2,21,1);
    PINSEL_ConfigPin(2,22,1);
    PINSEL_ConfigPin(2,23,1);
    PINSEL_ConfigPin(2,24,1);
    PINSEL_ConfigPin(2,25,1);
    PINSEL_ConfigPin(2,26,1);
    PINSEL_ConfigPin(2,27,1);
    PINSEL_ConfigPin(2,28,1);
    PINSEL_ConfigPin(2,29,1);
    PINSEL_ConfigPin(2,30,1);
    PINSEL_ConfigPin(2,31,1);

    for(i = 0; i < 32; i++)
    {
        PINSEL_ConfigPin(3,i,1);
        PINSEL_ConfigPin(4,i,1);
    }
    PINSEL_ConfigPin(5,0,1);
    PINSEL_ConfigPin(5,1,1);


    // Power On
    ret |= EMC_PwrOn();

    /*Init SDRAM controller*/
    LPC_SC->EMCDLYCTL |= (8<<0);
    /*Set data read delay*/
    LPC_SC->EMCDLYCTL |=(8<<8);
    LPC_SC->EMCDLYCTL |= (0x08 <<16);

    ret |= EMC_ConfigEndianMode(EMC_Config_Little_Endian_Mode);
    
         /* Dynamic memory setting */
    ret |= EMC_DynCtrlSelfRefresh(EMC_DYNAMIC_CTRL_SR_NORMALMODE);
    ret |= EMC_DynCtrlPowerDownMode(EMC_DYNAMIC_CTRL_DP_NORMAL);
    ret |= EMC_DynCtrlClockEnable(EMC_DYNAMIC_CTRL_CE_ALLCLK_HI);
    ret |= EMC_DynCtrlMMC(EMC_DYNAMIC_CTRL_MMC_CLKOUT_ENABLED);
    ret |= EMC_DynCtrlClockControl(EMC_DYNAMIC_CTRL_CE_CLKOUT_CONT);

    /* Timing */
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_REFRESH_TIMER, pConfig->RefreshTime);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_READ_CONFIG, pConfig->ReadConfig);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TRP, pConfig->PrechargeCmdPeriod);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TRAS, pConfig->Active2PreChargeTime);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TSREX, pConfig->SeftRefreshExitTime);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TAPR, pConfig->DataOut2ActiveTime);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TDAL, pConfig->DataIn2ActiveTime);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TWR, pConfig->WriteRecoveryTime);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TRC, pConfig->Active2ActivePeriod);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TRFC, pConfig->AutoRefrehPeriod);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TXSR, pConfig->ExitSelfRefreshTime);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TRRD, pConfig->ActiveBankLatency);
    ret |= EMC_SetDynMemoryParameter(EMC_DYN_MEM_TMRD, pConfig->LoadModeReg2Active);
    ret |= EMC_DynMemRAS(pConfig->CSn,pConfig->RASLatency);
    ret |= EMC_DynMemCAS(pConfig->CSn,pConfig->CASLatency);

    ret |= EMC_DynMemConfigMD(pConfig->CSn,EMC_DYNAMIC_CFG_MEMDEV_SDRAM);
    ret |= EMC_DynMemConfigAM(pConfig->CSn, pConfig->AddrBusWidth, pConfig->AddrMap, pConfig->DataWidth, pConfig->ChipSize);

    return ret;
}

/*********************************************************************//**
 * @brief         Initialize external static memory
 * @param[in]    pConfig    Configuration
 * @return         EMC_FUNC_OK/EMC_FUNC_INVALID_PARAM/EMC_FUNC_ERR
 **********************************************************************/
EMC_FUNC_CODE StaticMem_Init(EMC_STATIC_MEM_Config_Type* pConfig)
{
    uint32_t i;
    EMC_FUNC_CODE ret = EMC_FUNC_OK;
    /* Pin configuration:
    * P4.30 - /EMC_CS0
    * P4.31 - /EMC_CS1
    * P2.14 - /EMC_CS2
    * P2.15 - /EMC_CS3
    *
    *
    * P3.0-P3.31 - EMC_D[0-31]
    * P4.0-P4.23 - EMC_A[0-23]
    * P5.0-P5.1  - EMC_A[24-25]
    *
    * P4.24 - /EMC_OE
    * P4.25 - /EMC_WE
    *

    */
    PINSEL_ConfigPin(2,14,1);
    PINSEL_ConfigPin(2,15,1);

    for(i = 0; i < 32; i++)
    {
        PINSEL_ConfigPin(3,i,1);
        PINSEL_ConfigPin(4,i,1);
    }
    PINSEL_ConfigPin(5,0,1);
    PINSEL_ConfigPin(5,1,1);

    // Power On
    ret |= EMC_PwrOn();

    // Configuration
    if(pConfig->AddressMirror)
    {
        LPC_EMC->Control |= EMC_Control_M;
    }

     ret |= EMC_StaMemConfigMW(pConfig->CSn,pConfig->DataWidth);
    
    if(pConfig->PageMode)
         ret |= EMC_StaMemConfigPM(pConfig->CSn,EMC_CFG_PM_ASYNC_ENABLE);
    else
         ret |= EMC_StaMemConfigPM(pConfig->CSn,EMC_CFG_PM_DISABLE);

    if(pConfig->ByteLane)
         ret |= EMC_StaMemConfigPB(pConfig->CSn, EMC_CFG_BYTELAND_READ_BITSLOW);
    else
         ret |= EMC_StaMemConfigPB(pConfig->CSn, EMC_CFG_BYTELAND_READ_BITSHIGH);

    if(pConfig->ExtendedWait)
         ret |= EMC_StaMemConfigEW(pConfig->CSn,EMC_CFG_EW_ENABLED);
    else
         ret |= EMC_StaMemConfigEW(pConfig->CSn,EMC_CFG_EW_DISABLED);

    // Timing
     ret |= EMC_SetStaMemoryParameter(pConfig->CSn,EMC_STA_MEM_WAITWEN, pConfig->WaitWEn);
     ret |= EMC_SetStaMemoryParameter(pConfig->CSn,EMC_STA_MEM_WAITOEN, pConfig->WaitOEn);
     ret |= EMC_SetStaMemoryParameter(pConfig->CSn,EMC_STA_MEM_WAITRD, pConfig->WaitRd);
     ret |= EMC_SetStaMemoryParameter(pConfig->CSn,EMC_STA_MEM_WAITPAGE, pConfig->WaitPage);
     ret |= EMC_SetStaMemoryParameter(pConfig->CSn,EMC_STA_MEM_WAITWR, pConfig->WaitWr);
     ret |= EMC_SetStaMemoryParameter(pConfig->CSn,EMC_STA_MEM_WAITTURN, pConfig->WaitTurn);


    return ret;
}

/*********************************************************************//**
 * @brief         EMC initialize (power on block, config EMC pins).
 * @param[in]    None
 * @return         None
 **********************************************************************/
EMC_FUNC_CODE EMC_Init(void)
{
    uint8_t i;
    // If CPU clock is > 80 MHz, then divide it by two to create the EMC clock
    if(CLKPWR_GetCLK(CLKPWR_CLKTYPE_CPU) > 80000000) {
        CLKPWR_SetCLKDiv(CLKPWR_CLKTYPE_EMC, 1); // CPU clock / 2
    } else {
        CLKPWR_SetCLKDiv(CLKPWR_CLKTYPE_EMC, 0); // Same clock as CPU
    }

    LPC_SC->PCONP       |= 0x00000800;
    LPC_SC->EMCDLYCTL   = 0x00001010;
    LPC_EMC->Control     = 0x00000001;
    LPC_EMC->Config      = 0x00000000;

    /* Pin configuration:
    * P2.14 - /EMC_CS2
    * P2.15 - /EMC_CS3
    *
    * P2.16 - /EMC_CAS
    * P2.17 - /EMC_RAS
    * P2.18 - EMC_CLK[0]
    * P2.19 - EMC_CLK[1]
    *
    * P2.20 - EMC_DYCS0
    * P2.21 - EMC_DYCS1
    * P2.22 - EMC_DYCS2
    * P2.23 - EMC_DYCS3
    *
    * P2.24 - EMC_CKE0
    * P2.25 - EMC_CKE1
    * P2.26 - EMC_CKE2
    * P2.27 - EMC_CKE3
    *
    * P2.28 - EMC_DQM0
    * P2.29 - EMC_DQM1
    * P2.30 - EMC_DQM2
    * P2.31 - EMC_DQM3
    *
    * P3.0-P3.31 - EMC_D[0-31]
    * P4.0-P4.23 - EMC_A[0-23]
     * P5.0-P5.1  - EMC_A[24-25]
    *
    * P4.24 - /EMC_OE
    * P4.25 - /EMC_WE
    *
    * P4.30 - /EMC_CS0
    * P4.31 - /EMC_CS1
    */
    PINSEL_ConfigPin(2,14,1);
    PINSEL_ConfigPin(2,15,1);
    PINSEL_ConfigPin(2,16,1);
    PINSEL_ConfigPin(2,17,1);
    PINSEL_ConfigPin(2,18,1);
    PINSEL_ConfigPin(2,19,1);
    PINSEL_ConfigPin(2,20,1);
    PINSEL_ConfigPin(2,21,1);
    PINSEL_ConfigPin(2,22,1);
    PINSEL_ConfigPin(2,23,1);
    PINSEL_ConfigPin(2,24,1);
    PINSEL_ConfigPin(2,25,1);
    PINSEL_ConfigPin(2,26,1);
    PINSEL_ConfigPin(2,27,1);
    PINSEL_ConfigPin(2,28,1);
    PINSEL_ConfigPin(2,29,1);
    PINSEL_ConfigPin(2,30,1);
    PINSEL_ConfigPin(2,31,1);

    for(i = 0; i < 32; i++)
    {
        PINSEL_ConfigPin(3,i,1);
        PINSEL_ConfigPin(4,i,1);
    }