93c46seg.asm

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;///////////////////////////////////////////
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;创办人------刘永忠
;热线电话----[phone]
;[e-mail]
;本程序使用93c46存储七段码的实时状态
;请参考93C46资料
;///////////////////////////////////////////
;=====================================================
;AT93C46接口
CS		EQU	P1.0
SK		EQU	P1.1
DI		EQU	P1.2
DO		EQU	P1.3
;;=================================================================
;Number of valid address bits for the device in use .
;NADDR 是有效地址位的个数。
NADDR		EQU	7		; e.g. AT93C46 strapped for 8-bit data
						;AT93C46针对8位数据存储格式的设置格式。
addr_lo equ r0
data_lo equ r1
;;=================================================================
stack		equ	60H			; stack depth
							; 堆栈深度
	org	0000h
	ajmp	main
	org	0030h
main:
		mov	sp, #(stack-1)	; initialize stack pointer
							;初始化堆栈指针
		; Initialize AT93Cxx control lines.
		; 初始化AT93CXX控制行
		clr	CS				; low
		clr	SK				; low
		setb	DI			; high
		setb	DO			; high


;;================================================================
	CLR P2.0				;开个位显示
	mov 30h,#00h

	mov	addr_lo, #0			; address
							; 地址
	call	read
	mov a,data_lo
	mov 30h,a
	cjne	a,#0Ah,com1
com1: 
	jc loop
	mov	a,#00h
	mov 30h,a
;;=================================================================
loop:
	mov dptr,#tab
	movc a,@a+dptr
	mov p0,a
	inc 30h
	mov r4,#100
tt3:
	lcall delay10ms
	djnz	r4,tt3
		; Enable write.
		; 使能写
		call	ewen
		; Write byte 
		; 写字节
		mov	addr_lo, #00h	; address
		mov	data_lo, 30h	; data
		call	write		; check carry after return
							; 在返回之后检查标志位C
;;=================================================================
		; Disable write.    ;禁止写
		call	ewds
;;=================================================================
	mov a,30h
	cjne a,#10,loop
	mov	30h,#00h
	mov	a,30h
	ajmp	loop
;;=================================================================
delay10ms:
	mov r6,#100
tt2:
	mov r5,#50
	djnz r5,$
	djnz r6,tt2
	ret
	
tab:db 0c0h,0f9h,0a4h,0b0h,99h,92h,82h,0f8h,80h,90h,88h,83h,0c6h
	db 0a1h,86h,8eh
;;=================================================================
read:
	; Read data from addressed byte. 
	; Called with address in register ADDR_LO.
	; Returns data in register DATA_LO 
	; Destroys B, DPTR.
	; 从可寻址的字节中读数据
	; 调用,地址在寄存器addr_lo中
	; 返回的数据在寄存器data_lo中
	; 破坏寄存器B,dptr.
		setb	CS				; raise CS
								; 置位 CS
	; Shift out start bit (1) and op code (10).
	; 移位输出起始位(1)和操作码(10).
		mov	dpl, #110b
		mov	b, #3
		call	outdata
	; Shift out address, MSB first.
	; 移出地址,高位在先.
		mov	dpl, addr_lo		; low byte
		mov	b, #NADDR			; bit count
		call	outdata
	; Read output data.
	; 读出数据.
		call	indata			; get return data
		clr	CS					; drop CS
		ret
;;=================================================================
write:
	; Write data into the addressed byte .
	; ERASE is not required before WRITE.
	; Called with address in registers ADDR_LO,
	; data in registers DATA_LO.
	; Returns CY set to indicate error. Destroys B, DPTR.
	; 写数据到地址字节中
	; 写之前不需要擦除
	; 调用的地址在ADDR_LO中
	; 数据在DATA_LO
	; CY是error的一个标志位,破坏了B, DPTR.
		setb	CS				; raise CS
		mov	dpl, #101b
		mov	b, #3
		call	outdata
		; Shift out address, MSB first.
		; 移出地址,高位在先
		mov	dpl, addr_lo		; low byte
		mov	b, #NADDR	; bit count
		call	outdata
		; Shift out data, MSB first.
		; 移出数据,高位在先.
		mov	dpl, data_lo
		mov	b, #8
		call	outdata
		clr	CS					; drop CS
		; Poll device status.
		; 得出设备状态.
		call	status			; returns CY
		ret
;;=================================================================
ewen:
	; Enable erase/write.
	; Erase/write remains enabled until disabled with EWDS.
	; Returns nothing. Destroys B, DPTR.
	; 写使能.
	; 只有在写使能后才能写.
	; 不返回任何东西,破坏了B, DPTR.
		setb	CS			; raise CS
		; Shift out start bit (1), op code (00) and 11.
		; 移位输出起始位(1)和操作码(00),(11).
		mov	dptr, #(10011b SHL (NADDR-2))
		mov	b, #(NADDR+3)
		call	outdata
		clr	CS				; drop CS
		ret

;;=================================================================
ewds:
	; Disable erase/write.
	; Returns nothing. Destroys B, DPTR.
	; 写禁止.
	; 不返回任何东西,破坏了B, DPTR.
		setb	CS			; raise CS
		; Shift out start bit (1), op code (00) and 00.
		; 移位输出起始位(1)和操作码(00),(00).
		mov	dptr, #(10000b SHL (NADDR-2))
		mov	b, #(NADDR+3)
		call	outdata
		clr	CS				; drop CS
		ret

;;=================================================================
status:
	; Read device status.
	; The output is sampled every 50 microseconds until timeout
	; or ready. Allows a total of approximately 10 milliseconds for
	; the device to signal ready before timing out. 
	; The DO pin is allowed to float before status polling begins.
	; Returns CY cleared to indicate ready,set to indicate timeout.
	; All registers preserved (except flags).
	; 读设备状态.
	; 设备输出每50微秒采样一次直到超时或准备好.
	; 允许10毫秒的准备时间.
	; 在时间到之前,设备只是一个单一的准备时间.
	; 在状态准备开始之前,DO引脚允许是浮动的
	; 在准备状态CY为0,
	; 所有寄存器的值保存起来.
		push	b

		setb	DO			; float pin
		setb	CS			; select device

		mov	b, #220			; 220 * 50 uS = 11 mS

		; Delay 11 microseconds.
	ee40:
		push	b			; 2 uS
		mov	b, #22			; 2 uS
		djnz	b, $		; 2 uS * 22
		pop	b				; 2 uS

		jb	DO, ee41		; jump if DO is high (READY)

		djnz	b, ee40		; next pass
		setb	c			; flag error
		jmp	ee42			; return
	ee41:
		clr	c				; clear error flag
	ee42:
		clr	CS				; deselect device

		pop	b
		ret
;;=================================================================

indata:
	; Fetch data from the AT93Cxx.
	; The AT93Cxx family presents data most significant bit first.
	; The bit stream is assembled into bytes by function SHIN.
	; The CS pin is controlled by the caller.
	; The DO pin is allowed to float before data is read.
	; Destroys A.
	; 从93C46取出数据
	; AT93Cxx 家族呈现的数据最高位先出现.
	; 通过SHIN功能,位被装进字节
	; CS这个引脚被调用者控制.
	; 在数据被读之前,DO引脚浮动
	; 破坏了A.

		setb	DO			; float pin
		; Read and assemble first data byte.
		call	shin
		mov	data_lo, a		; save low byte
		ret
;;=================================================================
shin:
	; Shift in eight bits from the AT93Cxx,msb first, and
	; assemble them into a byte.On return,the SK pin is left low.
	; Returns assembled byte in A.
	; 从93C46移出8位,最高位优先.
	; 并把它们组装进一个字节.返回时,SK引脚让它为低
	; 返回时组装字节在A中.
		push	b
		clr	SK				; drop clock
		mov	b, #8			; init loop / delay min one uS
	ee30:               	
		setb	SK			; raise clock
		nop					; delay min one uS
		mov	c, DO			; read serial data output
		rlc	a				; shift in bit / delay min one uS
		clr	SK				; drop clock
		djnz	b, ee30		; next bit / delay min one uS

		pop	b
		ret

;;=================================================================
outdata:
	; Massage data and move it out to the AT93Cxx. formats it to 
	; be shifted out to the AT93Cxx by function SHOUT.
	; The CS pin is controlled by the caller.
	; right-justified,and a count of the number of valid bits in B.
	; Returns nothing. Destroys A, DPTR.
	; 数据信息移进AT93C46.
	; 通过SHOUT功能移进AT93C46.
	; CS引脚被调用者控制.
	; B是有效的位数.
	; 没有返回任何东西,破坏了A,DPTR.
		
		push	b
		mov	a, b			; get bit count
		clr	c				; compare count to eight
		subb	a, #8		;
		jc	ee6				; jump if count less than eight
		jz	ee5				; jump if count equals eight
		; Bit count greater than eight.
		; Use result of first subtraction in compares.
		mov	b, a			; save adjusted bit count
		clr	c				; compare adjusted count to eight
		subb	a, #8		;
		jc	ee2				; jump if count less than eight
		jnz	ee9				; jump if count greater than eight
		; Bit count equals eight.
		mov	a, dph
		jmp	ee4
		; Bit count less than eight.
		; Use count to position data.
	ee2:
		push	b			; save count
		mov	a, dph			; get data
	ee3:
		rr	a				; shift data
		djnz	b, ee3		;
		pop	b				; restore count
	ee4:
		call	shout
		; Did high byte. Do low byte, count equals eight.
		mov	b, #8
		; Bit count equals eight.
	ee5:
		mov	a, dpl
		jmp	ee8
		; Bit count less than eight.
		; Use count to position data.
	ee6:
		push	b			; save count
		mov	a, dpl			; get data
	ee7:
		rr	a				; shift data
		djnz	b, ee7		;
		pop	b				; restore count
	ee8:
		call	shout
	ee9:
		setb	DO			; leave pin floating
		pop	b
		ret

;;=================================================================
shout:
	; Shift out a byte to the AT93Cxx, most significant bit first.
	; On return, the SK pin is left low.
	; Returns nothing. Destroys A, B.
	; 一个字节移进93C46,最高位优先.
	; 返回时,SK引脚让它为低
	; 没有返回任何东西,破坏了A,DPTR
	ee50:
		clr	SK				; drop clock
		rlc	a				; move bit into CY
		mov	DI, c			; output bit
		nop					; delay min 400 nS
		setb	SK			; raise clock
		djnz	b, ee50		; next bit / delay min one uS

		clr	SK				; drop clock
		ret

;##################################################################

		END