port_initial.lst

基于C8051F实现数字变压器,用C语言实现其控制思想,液晶,键盘都有.主要的是变压器控制思想.

C51 COMPILER V8.02   PORT_INITIAL                                                          08/24/2007 16:41:25 PAGE 1   


C51 COMPILER V8.02, COMPILATION OF MODULE PORT_INITIAL
OBJECT MODULE PLACED IN Port_Initial.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE Port_Initial.c BROWSE DEBUG OBJECTEXTEND

line level    source

   1          /*****************************************************************/
   2          /*函数名称： Port_Initial.c                                      */
   3          /*函数功能： 主函数,调用各模块                                   */
   4          /*基本思想:  对所涉及到的端口进行配置                            */
   5          /*修改记录： 无修改记录                                          */
   6          /*编写作者： t483-4-19chenyong                                   */
   7          /*编写日期： 2007-4-14                                           */
   8          /*****************************************************************/
   9          
  10          #include "common.h"
  11          #include "delay.h"
  12          
  13          void PORT_Init (void)
  14          {
  15   1         WDTCN = 0xde;
  16   1         WDTCN = 0xad;
  17   1        
  18   1         SYSCLK_Init();
  19   1      
  20   1         SFRPAGE=0x0f;
  21   1         XBR1 = 0x04;
  22   1         XBR2 = 0x50;                    // Enable crossbar and weak pull-ups
  23   1         SFRPAGE=0x0f;
  24   1         P0MDOUT      =0x00;
  25   1         P1=0xff;
  26   1         P1MDOUT |= 0xff;                // enable P1.6 (LED) as push-pull output
  27   1         P2MDOUT      =0x00;
  28   1         P3MDOUT      =0x00;
  29   1         P4MDOUT      =0x00;
  30   1         P5MDOUT      =0x00;
  31   1         P6MDOUT      =0x00;
  32   1         P7MDOUT      =0x00;
  33   1      
  34   1      }
  35          
  36           
  37          void SYSCLK_Init (void)
  38          {
  39   1         int i;                           // delay counter
  40   1      
  41   1         char old_SFRPAGE = SFRPAGE;      // Store current SFRPAGE
  42   1      
  43   1         SFRPAGE = CONFIG_PAGE;           // set SFR page
  44   1      
  45   1         OSCXCN = 0x67;                   // start external oscillator with
  46   1                                          // 22.1184MHz crystal
  47   1      
  48   1         for (i=0; i < 256; i++) ;        // Wait for osc. to start up
  49   1      
  50   1         while (!(OSCXCN & 0x80)) ;       // Wait for crystal osc. to settle
  51   1      
  52   1         CLKSEL = 0x01;                   // Select the external osc. as
  53   1                                          // the SYSCLK source
  54   1      
  55   1         OSCICN = 0x00;                   // Disable the internal osc.
C51 COMPILER V8.02   PORT_INITIAL                                                          08/24/2007 16:41:25 PAGE 2   

  56   1      
  57   1        //Turn on the PLL and increase the system clock by a factor of M/N = 9/4
  58   1         SFRPAGE = PLL0_PAGE;
  59   1      
  60   1         PLL0CN  = 0x04;                  // Set PLL source as external osc.
  61   1         SFRPAGE = LEGACY_PAGE;
  62   1         FLSCL   = 0x10;                  // Set FLASH read time for 50MHz clk
  63   1                                          // or less
  64   1         SFRPAGE = PLL0_PAGE;
  65   1         PLL0CN |= 0x01;                  // Enable Power to PLL
  66   1         PLL0DIV = 0x03;                  // Set Pre-divide value to N (N = 4)
  67   1         PLL0FLT = 0x01;                  // Set the PLL filter register for
  68   1                                          // a reference clock from 19 - 30 MHz
  69   1                                          // and an output clock from 45 - 80 MHz
  70   1         PLL0MUL = 0x0c;                  // Multiply SYSCLK by M (M = 9)
  71   1      
  72   1         for (i=0; i < 256; i++) ;        // Wait at least 5us
  73   1         PLL0CN  |= 0x02;                 // Enable the PLL
  74   1         while(!(PLL0CN & 0x10));         // Wait until PLL frequency is locked
  75   1         CLKSEL  = 0x02;                  // Select PLL as SYSCLK source          
  76   1      
  77   1         SFRPAGE = old_SFRPAGE;           // restore SFRPAGE
  78   1      } 
  79          
  80           


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    133    ----
   CONSTANT SIZE    =   ----    ----
   XDATA SIZE       =   ----    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =   ----    ----
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)