adc0_init.lst

基于8051F单片机,实现1024点的FFT 用C 语言实现的.效果与FPGA实现相同.

C51 COMPILER V8.02   ADC0_INIT                                                             05/09/2008 21:51:23 PAGE 1   


C51 COMPILER V8.02, COMPILATION OF MODULE ADC0_INIT
OBJECT MODULE PLACED IN ADC0_Init.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE ADC0_Init.c BROWSE DEBUG OBJECTEXTEND

line level    source

   1          
   2          #include "common.h"
   3          #include "ADC0.h"
   4          #include "int_fft.h"
   5          
   6          unsigned int index, ADC_Index;
   7          
   8          //-----------------------------------------------------------------------------
   9          // TIMER3_Init
  10          //-----------------------------------------------------------------------------
  11          //
  12          // Configure Timer3 to auto-reload at interval specified by <counts> (no
  13          // interrupt generated) using SYSCLK as its time base.
  14          //
  15          void TIMER3_Init (int counts)
  16          {
  17   1         char old_SFRPAGE = SFRPAGE;      // Save Current SFR page
  18   1      
  19   1         SFRPAGE = TMR3_PAGE;             // Switch to Timer3 Setup Page
  20   1      
  21   1         TMR3CN = 0x00;                   // Stop Timer3; Clear TF3
  22   1         TMR3CF = 0x08;                   // use SYSCLK as timebase
  23   1      
  24   1         RCAP3  = -counts;                // Init reload values
  25   1         TMR3    = 0xffff;                // set to reload immediately
  26   1         EIE2   &= ~0x01;                 // disable Timer3 interrupts
  27   1         TR3 = 0x01;                      // start Timer3
  28   1      
  29   1         SFRPAGE = old_SFRPAGE;           // restore SFRPAGE
  30   1      }
  31          
  32          
  33          //-----------------------------------------------------------------------------
  34          // ADC0_Init
  35          //-----------------------------------------------------------------------------
  36          //
  37          // Configure ADC0 to use Timer3 overflows as conversion source, to
  38          // generate an interrupt on conversion complete, and to use left-justified
  39          // output mode.  Enables ADC0 end of conversion interrupt. Enables ADC0.
  40          //
  41          void ADC0_Init (void)
  42          {
  43   1         char old_SFRPAGE = SFRPAGE;      // Store current SFRPAGE
  44   1      
  45   1         SFRPAGE = ADC0_PAGE;             // Switch to ADC0 Setup Page
  46   1         ADC0CN = 0x05;                   // ADC disabled; normal tracking
  47   1                                          // mode; ADC conversions are initiated
  48   1                                          // on overflow of Timer3, left-justify
  49   1      
  50   1         REF0CN = 0x03;                   // enable on-chip VREF and output buffer
  51   1      
  52   1         AMX0CF = 0x00;                   // Single-ended AIN0.0 input
  53   1         AMX0SL = 0x00;
  54   1      
  55   1         ADC0CF = (SYSCLK/(2*2500000)) << 3;  // ADC conversion clock <= 2.5MHz
C51 COMPILER V8.02   ADC0_INIT                                                             05/09/2008 21:51:23 PAGE 2   

  56   1         ADC0CF |= 0x00;                  // PGA gain = 1
  57   1      
  58   1         AD0EN = 1;                       // enable ADC0
  59   1      
  60   1         SFRPAGE = old_SFRPAGE;           // restore SFRPAGE
  61   1      }
  62          
  63          
  64          //-----------------------------------------------------------------------------
  65          // Interrupt Service Routines
  66          //-----------------------------------------------------------------------------
  67          
  68          //-----------------------------------------------------------------------------
  69          // ADC0_ISR
  70          //-----------------------------------------------------------------------------
  71          //
  72          // ADC end-of-conversion ISR
  73          // The ADC sample is stored in memory, and an index variable is incremented.
  74          // If enough samples have been taken to process the FFT, then a flag is set,
  75          // and ADC interrupts are disabled until the next set is requested.
  76          //
  77          void ADC0_ISR (void) interrupt 15 using 3
  78          {
  79   1        AD0INT = 0;                      // clear ADC conversion complete
  80   1                                          // flag
  81   1      
  82   1         Real[ADC_Index] = ADC0;          // store ADC value
  83   1      
  84   1         ADC_Index++;                     // Increment the index into memory
  85   1        
  86   1         if (ADC_Index >= NUM_FFT)        // If enough samples have been collected
  87   1         {
  88   2            Conversion_Set_Complete = 1;  // Tell the Main Routine and...
  89   2            EIE2 = ~0x02;                // disable ADC interrupts
  90   2                EIE2 &=EIE2;
  91   2         }
  92   1         
  93   1      }
*** WARNING C316 IN LINE 93 OF ADC0_Init.c: unterminated conditionals


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    129    ----
   CONSTANT SIZE    =   2560    ----
   XDATA SIZE       =   ----    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =      6    ----
   IDATA SIZE       =   ----    ----
   BIT SIZE         =      1    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  1 WARNING(S),  0 ERROR(S)