📄 main.lst
字号:
C51 COMPILER V8.02 MAIN 05/09/2008 21:51:22 PAGE 1
C51 COMPILER V8.02, COMPILATION OF MODULE MAIN
OBJECT MODULE PLACED IN main.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE main.c BROWSE DEBUG OBJECTEXTEND
line level source
1
2 //-----------------------------------------------------------------------------
3 // IntFFT_BRIN.c
4 //-----------------------------------------------------------------------------
5 // Copyright 2003 Cygnal Integrated Products, Inc.
6 //
7 // AUTH: BD
8 // DATE: 30 JAN 03
9 //
10 // This program collects data using ADC0 at <SAMPLE_RATE> Hz and performs
11 // an FFT on the data. The Real and Imaginary parts of the results are then
12 // sent to the UART peripheral at <BAUDRATE> bps, where they can be displayed
13 // or captured using a terminal program.
14 //
15 // Note that the FFT performed in this software is optimized for storage space
16 // (RAM). The resulting Frequency-domain data is not suitable for analyzing
17 // Signal-to-noise or distortion performance.
18 //
19 // This program uses a 22.1184 MHz crystal oscillator multiplied by (9/4)
20 // for an effective SYSCLK of 49.7664 Mhz. This program also initializes and
21 // uses UART0 at <BAUDRATE> bits per second.
22 //
23 // Target: C8051F12x
24 // Tool chain: KEIL C51 6.03
25 //
26 #include "common.h"
27 #include "Int_FFT.h"
28 #include "ADC0.h"
29
30
31 bit Conversion_Set_Complete=0;
32 unsigned int BinNum=0;
33 unsigned int index=0, ADC_Index=0;
34
35 void main()
36 {
37 1
38 1 // disable watchdog timer
39 1 WDTCN = 0xde;
40 1 WDTCN = 0xad;
41 1
42 1
43 1 SYSCLK_Init(); // initialize external clock and PLL
44 1 PORT_Init (); // set up Port I/O
45 1 UART0_Init (); // initialize UART0
46 1 TIMER3_Init (SYSCLK/SAMPLE_RATE); // initialize Timer3 to overflow at
47 1 // <SAMPLE_RATE>
48 1 ADC0_Init (); // init ADC0
49 1
50 1 EA = 1; // globally enable interrupts
51 1
52 1 while (1)
53 1 {
54 2 ADC_Index = 0;
55 2 Conversion_Set_Complete = 0;
C51 COMPILER V8.02 MAIN 05/09/2008 21:51:22 PAGE 2
56 2
57 2 EIE2 |= 0x02; // enable ADC interrupts
58 2
59 2 SFRPAGE = LEGACY_PAGE;
60 2
61 2 while(!Conversion_Set_Complete);
62 2
63 2
64 2 SFRPAGE = UART0_PAGE;
65 2 printf("\nCollected Data\nSample\tValue\n");
66 2 for (BinNum = 0; BinNum < NUM_FFT; BinNum++)
67 2 {
68 3 // Print Data in the format: Sample <tab> Value <tab>
69 3 printf("%d\t%u\n", BinNum, Real[BinNum]);
70 3 }
71 2
72 2 WindowCalc(Real, 1); // Window Real Data, and convert to
73 2 // differential if it is single-ended
74 2
75 2 Bit_Reverse(Real); // Sort Real (Input) Data in bit-reverse
76 2 // order
77 2 Int_FFT(Real, Imag); // Perform FFT on data
78 2
79 2 SFRPAGE = UART0_PAGE;
80 2
81 2 printf("\nBin\tReal\tImag\n");
82 2
83 2 // Output the FFT data to the UART
84 2 for (BinNum = 0; BinNum < NUM_FFT; BinNum++)
85 2 {
86 3 // Print Data in the format: Bin <tab> Real <tab> Imaginary
87 3 printf("%d\t%d\t%d\n", BinNum, Real[BinNum], Imag[BinNum]);
88 3 }
89 2
90 2 if (RUN_ONCE)
91 2 while(1);
92 2
93 2 }
94 1 }
*** WARNING C316 IN LINE 94 OF main.c: unterminated conditionals
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 245 ----
CONSTANT SIZE = 2623 ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = 6 ----
IDATA SIZE = ---- ----
BIT SIZE = 1 ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 1 WARNING(S), 0 ERROR(S)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -