freq_core.c

yamon2.27.tar.gz bootloader 在au1200上完全通过

/************************************************************************
 *
 *  freq_core.c
 *
 *  Core card specifics of FREQ module
 *
 *
 * ######################################################################
 *
 * Copyright (c) 1999-2000 MIPS Technologies, Inc. All rights reserved. 
 * 
 * Unpublished rights reserved under the Copyright Laws of the United States of 
 * America. 
 * 
 * This document contains information that is proprietary to MIPS Technologies, 
 * Inc. ("MIPS Technologies"). Any copying, modifying or use of this information 
 * (in whole or in part) which is not expressly permitted in writing by MIPS 
 * Technologies or a contractually-authorized third party is strictly 
 * prohibited. At a minimum, this information is protected under unfair 
 * competition laws and the expression of the information contained herein is 
 * protected under federal copyright laws. Violations thereof may result in 
 * criminal penalties and fines. 
 * MIPS Technologies or any contractually-authorized third party reserves the 
 * right to change the information contained in this document to improve 
 * function, design or otherwise. MIPS Technologies does not assume any 
 * liability arising out of the application or use of this information. Any 
 * license under patent rights or any other intellectual property rights owned 
 * by MIPS Technologies or third parties shall be conveyed by MIPS Technologies 
 * or any contractually-authorized third party in a separate license agreement 
 * between the parties. 
 * The information contained in this document constitutes one or more of the 
 * following: commercial computer software, commercial computer software 
 * documentation or other commercial items. If the user of this information, or 
 * any related documentation of any kind, including related technical data or 
 * manuals, is an agency, department, or other entity of the United States 
 * government ("Government"), the use, duplication, reproduction, release, 
 * modification, disclosure, or transfer of this information, or any related 
 * documentation of any kind, is restricted in accordance with Federal 
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal 
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use of 
 * this information by the Government is further restricted in accordance with 
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 * conditions covering this information from MIPS Technologies or any 
 * contractually-authorized third party. 
 *
 ************************************************************************/


/************************************************************************
 *  Include files
 ************************************************************************/

#include <sysdefs.h>
#include <sys_api.h>
#include <syscon_api.h>
#include <product.h>
#include <gt64120.h>

/************************************************************************
 *  Definitions
 ************************************************************************/

/************************************************************************
 *  Public variables
 ************************************************************************/

/************************************************************************
 *  Static variables
 ************************************************************************/

/************************************************************************
 *  Static function prototypes
 ************************************************************************/

static void
core_config(
    UINT32 freq_khz );

/************************************************************************
 *  Implementation : Public functions
 ************************************************************************/


/************************************************************************
 *
 *                          arch_core_estimate_busfreq
 *  Description :
 *  -------------
 *
 *  Estimate external bus (SysAD) clock frequency.
 *
 *  Return values :
 *  ---------------
 *
 *  Estimated frequency in Hz.
 *
 ************************************************************************/
UINT32
arch_core_estimate_busfreq( void )
{
    UINT32 cp0_countperiod;
    UINT32 endvalue;
    UINT32 cycle_per_count;
    UINT32 data = 0;

    switch( sys_corecard )
    {
      case MIPS_REVISION_CORID_QED_RM5261 :
      case MIPS_REVISION_CORID_CORE_LV :

        /*  Use timer in GT64120 in conjunction with cp0 timer to
         *	estimate the external bus frequency.
         */

        #define STARTVALUE	((UINT32) 0x800000)
        #define COUNTPERIOD	((UINT32) 20)		/* ms */

        /* Determine number of CPU cycles per CPU counter tick */
        SYSCON_read(
            SYSCON_CPU_CYCLE_PER_COUNT_ID,
	    &cycle_per_count,
	    sizeof(UINT32) );

        cp0_countperiod = 
            (sys_cpufreq_hz / 1000) * COUNTPERIOD / cycle_per_count;

        /* Start GT64120 counter */
        GT_W32( sys_nb_base, GT_TCCTRL_OFS,   0 );
	GT_W32( sys_nb_base, GT_TC0VALUE_OFS, STARTVALUE );
	GT_W32( sys_nb_base, GT_TCCTRL_OFS,   GT_TCCTRL_ENTC0_BIT);

        /* Wait on cp0 counter */
	SYSCON_write( SYSCON_CPU_CP0_COUNT_ID,
		      (void *)(&data),
		      sizeof(UINT32) );
        do
        {
            SYSCON_read( SYSCON_CPU_CP0_COUNT_ID,
	                 (void *)(&data),
			 sizeof(UINT32) );
        }
        while (data < cp0_countperiod);

        /* Stop GT64120 counter and read value */
	GT_W32( sys_nb_base, GT_TCCTRL_OFS,   0 );
	GT_L32( sys_nb_base, GT_TC0VALUE_OFS, endvalue );

        return ((STARTVALUE - endvalue) / COUNTPERIOD) * ((UINT32)1000);

      /* Add new core cards here ! */

      default : /* Should never happen */

	return sys_cpufreq_hz;
   }
}


/************************************************************************
 *  Implementation : Static functions
 ************************************************************************/