init_platform_s.s

yamon2.27.tar.gz bootloader 在au1200上完全通过

/************************************************************************
 *
 *  init_platform_s.S
 *
 *  Platform specific startup code (assembler)
 *
 *
 * ######################################################################
 *
 * Copyright (c) 1999-2000 MIPS Technologies, Inc. All rights reserved. 
 * 
 * Unpublished rights reserved under the Copyright Laws of the United States of 
 * America. 
 * 
 * This document contains information that is proprietary to MIPS Technologies, 
 * Inc. ("MIPS Technologies"). Any copying, modifying or use of this information 
 * (in whole or in part) which is not expressly permitted in writing by MIPS 
 * Technologies or a contractually-authorized third party is strictly 
 * prohibited. At a minimum, this information is protected under unfair 
 * competition laws and the expression of the information contained herein is 
 * protected under federal copyright laws. Violations thereof may result in 
 * criminal penalties and fines. 
 * MIPS Technologies or any contractually-authorized third party reserves the 
 * right to change the information contained in this document to improve 
 * function, design or otherwise. MIPS Technologies does not assume any 
 * liability arising out of the application or use of this information. Any 
 * license under patent rights or any other intellectual property rights owned 
 * by MIPS Technologies or third parties shall be conveyed by MIPS Technologies 
 * or any contractually-authorized third party in a separate license agreement 
 * between the parties. 
 * The information contained in this document constitutes one or more of the 
 * following: commercial computer software, commercial computer software 
 * documentation or other commercial items. If the user of this information, or 
 * any related documentation of any kind, including related technical data or 
 * manuals, is an agency, department, or other entity of the United States 
 * government ("Government"), the use, duplication, reproduction, release, 
 * modification, disclosure, or transfer of this information, or any related 
 * documentation of any kind, is restricted in accordance with Federal 
 * Acquisition Regulation 12.212 for civilian agencies and Defense Federal 
 * Acquisition Regulation Supplement 227.7202 for military agencies. The use of 
 * this information by the Government is further restricted in accordance with 
 * the terms of the license agreement(s) and/or applicable contract terms and 
 * conditions covering this information from MIPS Technologies or any 
 * contractually-authorized third party. 
 *
 ************************************************************************/

/************************************************************************
 *  Include files
 ************************************************************************/
	
#include <sysdefs.h>
#include <sys_api.h>
#include <mips.h>
#include <init.h>
#include <product.h>
#include <atlas.h>
#include <malta.h>
#include <sead.h>
#include <pb1000.h>
#include <uart.h>

/************************************************************************
 *  Definitions
 ************************************************************************/

#define DISP_DIRECT( reg, ch ) \
	lui     k0, (KSEG1(reg) >> 16);\
	addiu   k0, (KSEG1(reg) & 0xFFFF );\
	li	k1, ch;\
	sw	k1, 0(k0)

/************************************************************************
 *  Public variables
 ************************************************************************/

/************************************************************************
 *  Static variables
 ************************************************************************/

/************************************************************************
 *  Implementation : Public functions
 ************************************************************************/
	
	.set noreorder

/************************************************************************
 *  sys_platform_early
 ************************************************************************/
LEAF(sys_platform_early)
#if 0
	/* Early platform specific initialisation.
	 * Don't use registers other than k0/k1 until after
	 * we have made sure an NMI has not occurred.
	 */

	li	k1, PRODUCT_ATLASA_ID
	beq	k1, k0, early_atlas
	nop
	li	k1, PRODUCT_MALTA_ID
	beq	k1, k0, early_malta
	nop
	li	k1, PRODUCT_SEAD_ID
	beq	k1, k0, early_sead
	nop
	li	k1, PRODUCT_SEAD2_ID
	beq	k1, k0, early_sead
	nop	

	/* Unknown platform */
	li	v0, ERROR_PLATFORM_UNKNOWN
	b	done
	nop

early_atlas:

	/**** Atlas ****/

	/* Detect NMI */
	li	k0, KSEG1( ATLAS_NMISTATUS )
	lw	k1, 0(k0)
	li	k0, ATLAS_NMISTATUS_ONNMI_MSK
	and	k1, k0
	bne	k1, zero, disp_nmi
	nop
	b	early_core
	nop
		
early_malta:

	/**** Malta ****/

	/* Detect NMI */
	li	k0, KSEG1( MALTA_NMISTATUS )
	lw	k1, 0(k0)
	li	k0, MALTA_NMISTATUS_SB_MSK | MALTA_NMISTATUS_ONNMI_MSK
	and	k1, k0
	beq	k1, zero, early_core
	nop
	
disp_nmi:		
	/*  Display message 'NMI'. Can't use DISP_STR since
	 *  this would modify some registers.
	 *  Code shared between Atlas and Malta.
	 */
	DISP_DIRECT( ATLAS_ASCIIPOS0, 'N' )
	DISP_DIRECT( ATLAS_ASCIIPOS1, 'M' )
	DISP_DIRECT( ATLAS_ASCIIPOS2, 'I' )
	DISP_DIRECT( ATLAS_ASCIIPOS3, ' ' )
	DISP_DIRECT( ATLAS_ASCIIPOS4, ' ' )
	DISP_DIRECT( ATLAS_ASCIIPOS5, ' ' )
	DISP_DIRECT( ATLAS_ASCIIPOS6, ' ' )
	DISP_DIRECT( ATLAS_ASCIIPOS7, ' ' )							
	
	b	nmi
	nop

early_sead:		
	/**** SEAD. We support only Basic RTL ****/

	li	k1, KSEG1(SEAD_REVISION)
	lw	k0, 0(k1)
	li	k1, SEAD_REVISION_RTLID_MSK
	and	k0, k1
	li	k1, (SEAD_REVISION_RTLID_BASIC << SEAD_REVISION_RTLID_SHF)
	beq	k0, k1, sead_nmi_detect
	nop

	li	v0, ERROR_PLATFORM_UNKNOWN
	b	done
	nop

sead_nmi_detect:	
	/* Detect NMI */
	li	k0, KSEG1( SEAD_NMISTATUS )
	lw	k1, 0(k0)
	li	k0, SEAD_NMISTATUS_FLAG_MSK
	and	k1, k0
	bne	k1, zero, sead_nmi
	nop

	/* Restore k0 so that it holds boardID field */
	li	k0, MIPS_REVISION
	li	t0, MIPS_REVISION_PROID_MSK
	and	k0, t0
	li	t0, MIPS_REVISION_PROID_SHF
	srlv	k0, k0, t0
	
	b	done
	move	v0, zero

sead_nmi:
	/*  Display message 'NMI'. Can't use DISP_STR since
	 *  this would modify some registers.
	 */

	DISP_DIRECT( SEAD_ASCIIPOS0, 'N' )
	DISP_DIRECT( SEAD_ASCIIPOS1, 'M' )
	DISP_DIRECT( SEAD_ASCIIPOS2, 'I' )
	DISP_DIRECT( SEAD_ASCIIPOS3, ' ' )
	DISP_DIRECT( SEAD_ASCIIPOS4, ' ' )
	DISP_DIRECT( SEAD_ASCIIPOS5, ' ' )
	DISP_DIRECT( SEAD_ASCIIPOS6, ' ' )
	DISP_DIRECT( SEAD_ASCIIPOS7, ' ' )							

nmi:
	/*  NMI occurred.
	 *  Jump to NMI exception RAM handler
	 *  If the RAM handler has not been installed
	 *  yet (NMI very fast after RESET), the behaviour 
	 *  is undefined.
	 */

	li      k0, 0x80000000 + SYS_NMI_RAM_VECTOR_OFS
	jr	k0
	nop

early_core:

	/* Restore k0 so that it holds boardID field */
	li	k0, MIPS_REVISION
	li	t0, MIPS_REVISION_PROID_MSK
	and	k0, t0
	li	t0, MIPS_REVISION_PROID_SHF
	srlv	k0, k0, t0

	/* Init controller */
	li	a0, ATLAS_CORECTRL_BASE
	jal	sys_core_init
	nop
	bne	v0, zero, done	/* Error */
	nop
	beq	v1, zero, done  /* No error and no reset request */
	nop	

	/* Request software reset */
	li	t0, PRODUCT_ATLASA_ID
	beq	k0, t0, reset_atlas
	nop

	/* Malta : Request software reset */
	li      t0, KSEG1(MALTA_SOFTRES)
	li	t1, MALTA_SOFTRES_RESET_GORESET
	sw	t1, 0(t0)
1:
	b	1b
	nop

reset_atlas:
	/* Atlas : Request software reset */
	li      t0, KSEG1(ATLAS_SOFTRES)
	li	t1, ATLAS_SOFTRES_RESET_GORESET
	sw	t1, 0(t0)
1:
	b	1b
	nop

done:	
#endif
	li	v0, 0 /* No Error */
	/* Return to initialisation code */
	la	t0, sys_platform_early_done
	KSEG1A( t0 )  /* Make it uncached */
	jr	t0
	nop	

END(sys_platform_early)
	
/**********************************************************************/

	.set noreorder

	/* t1 has chip-select sdaddr value */
	/* it updates v0 accordingly */
	/* the layout of CSMASK and E happen to be the same in all controllers */
computeCSsize:
	li		t3, (1<<20)		/* mem_sdaddr[E] */
	and		t2, t1, t3
	beq		t2, zero, 1f
	nop
	sll		t1, 22			/* justify mem_sdaddr[CSMASK] */
	xor		t1, 0xFFFFFFFF	/* complement */
	addiu	t1, 1			/* size */
	addu	v0, t1			/* accumulate */
1:
	jr		ra
	nop

	.set reorder

/**********************************************************************/

/************************************************************************
 *  sys_init_platform
 ************************************************************************/
LEAF(sys_init_platform)


#if 0
	/* Atlas */	
	li	t0, PRODUCT_ATLASA_ID
	bne	k0, t0, 2f
	nop
	la	t0, sys_init_atlas_malta
	jr	t0
	nop
2:
	/* Malta */	
	li	t0, PRODUCT_MALTA_ID
	bne	k0, t0, 2f
	nop
	la	t0, sys_init_atlas_malta
	jr	t0
	nop
2:
	/* SEAD */			
	li	t0, PRODUCT_SEAD_ID
	bne	k0, t0, 2f
	nop
	la	t0, sys_init_sead
	jr	t0
	nop
2:
	/* SEAD-2 */
	li	t0, PRODUCT_SEAD2_ID
	bne	k0, t0, 2f
	nop
	la	t0, sys_init_sead2
	jr	t0
	nop
2:		

	/* Unknown platform */
	jr	ra
	li	v0, ERROR_PLATFORM_UNKNOWN
#endif

	/* PBupdate	- Alchemy specific
	 * The function returns the following parameters :
	 * v0 = error code (0 = no error)
	 * v1 = RAM size in bytes
	 */

#ifndef PB1000_SYSTEMRAM_SIZE

	.set noreorder
	/* Compute sys_ramsize by interrogating the SDRAM memory controller */
	li	v0, 0
	move	v1, ra /* preserve RA */

	mfc0	t0, $15 /* CP0_PRId */
	li		t1, 0xFF000000
	and		t0, t1
	srl		t0, 24
	li		t1, 4
	beq		t0, t1, sizeAu1200
	nop
	li		t1, 3
	beq		t0, t1, sizeAu1550
	nop

sizeAu1000:
sizeAu1500:
sizeAu1100:
	li		t0, 0xB4000000
	jal		computeCSsize
	lw		t1, 0x000C(t0)	/* mem_sdaddr0 */
	jal		computeCSsize
	lw		t1, 0x0010(t0)	/* mem_sdaddr1 */
	jal		computeCSsize
	lw		t1, 0x0014(t0)	/* mem_sdaddr2 */
	b		sizeDRAMdone
	nop

sizeAu1550:
	li		t0, 0xB4000000
	jal		computeCSsize
	lw		t1, 0x0820(t0)	/* mem_sdaddr0 */
	jal		computeCSsize
	lw		t1, 0x0828(t0)	/* mem_sdaddr1 */
	jal		computeCSsize
	lw		t1, 0x0830(t0)	/* mem_sdaddr2 */
	b		sizeDRAMdone
	nop

sizeAu1200:
	li		t0, 0xB4000000
	jal		computeCSsize
	lw		t1, 0x0820(t0)	/* mem_sdaddr0 */
	jal		computeCSsize
	lw		t1, 0x0828(t0)	/* mem_sdaddr1 */
	b		sizeDRAMdone
	nop

sizeDRAMdone:
	move ra, v1 /* restore RA */
	move v1, v0 /* RAMSIZE */

#else
	li	v1, PB1000_SYSTEMRAM_SIZE
#endif

	move v0, zero /* no error */

	jr	ra
	nop

END(sys_init_platform)

	.global sys_disp_string_c
sys_disp_string_c:
	/* move arg to where sys_disp_string expects it, fall thru */
	move t9, a0

/************************************************************************
 *  sys_disp_string
 *
 * Available t5, t6, t7, t9=string ptr
 ************************************************************************/
LEAF(sys_disp_string)

/* Uncomment the following line, or provide in pb1000.h, for debug messages */
//#define DEBUG_UART_BASE UART0_BASE

#ifdef DEBUG_UART_BASE

	li    t6, DEBUG_UART_BASE

	/* check if UART initialized */
	lw	t5,0x100(t6)
	andi t5,t5,3
	li	t7,3
	beq	t5,t7,disp_string_loop
	nop

init_uart:
	sw	zero,UART_ENABLE(t6) # disable module and clock
	sync
	ori	t5, zero, UART_ENABLE_CE	# enable clock first
	sw	t5, UART_ENABLE(t6)
	sync
	ori	t5, zero, (UART_ENABLE_CE | UART_ENABLE_E)
	sw	t5, UART_ENABLE(t6)
	sync
	sw	zero, UART_INTEN(t6)
	li	t5, 0x7
	sw	t5, UART_FIFOCTRL(t6)

	/* Compute CLKDIV = CPU Freq / (SD * BAUDRATE * 2 * 16) */
	li	t6, 0xb1900000
	lw	t7, 0x3C(t6)					# load sys_powerctrl
	andi t7, t7, 0x3
	addi t7, t7, 2						# sys_powerctrl[SD]+2
	li	t5, PREFERRED_BAUDRATE
	mul t7, t7, t5
	li	t5, 2*16
	mul t7, t7, t5						# t7 contains (SD*BAUDRATE*2*16)
	lw	t5, 0x60(t6)					# load sys_cpupll
	andi t5, t5, 0x3F
	li	t6, AU1000_CPUOSC_FREQ
	mul	t5, t5, t6						# t5 contains (CPU Freq)
	div t5, t5, t7						# t5 = t5 / t7

	li  t6, DEBUG_UART_BASE
	sw	t5, UART_CLKDIV(t6)
	li	t5, 0x03						# N81
	sw	t5, UART_LINECTRL(t6)
	sync

disp_string_loop:
	lw    t5,UART_LINESTAT(t6)
	andi  t5,UART_LINESTAT_TE
	beq   t5,zero,disp_string_loop
	nop
	lb    t5, 0(t9)
	beq   t5, zero, 1f
	nop
	sw    t5,UART_TXDATA(t6)
	beq   zero,zero,disp_string_loop
	addiu t9,t9,1

1:
	lw    t5,UART_LINESTAT(t6)
	andi  t5,UART_LINESTAT_TE
	beq   t5,zero,1b
	nop
	li    t5,'\n'
	sw    t5,UART_TXDATA(t6)

1:
	lw    t5,UART_LINESTAT(t6)
	andi  t5,UART_LINESTAT_TE
	beq   t5,zero,1b
	li    t5,'\r'
	sw    t5,UART_TXDATA(t6)

1:
	lw    t5,UART_LINESTAT(t6)
	andi  t5,UART_LINESTAT_TE
	beq   t5,zero,1b
	nop

#endif /* DEBUG_UART_BASE */

	jr    ra
	nop
	
END(sys_disp_string)

	
/************************************************************************
 *  Implementation : Static functions
 ************************************************************************/