📄 syscon_platform.c
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board_systemflash_write_enable_atlas_write(
void *param,
void *data )
{
REGP(KSEG1BASE, ATLAS_SFWCTRL) = ATLAS_SFWCTRL_WRENA_ENSFWRITE;
return OK;
}
/************************************************************************
* board_systemflash_write_enable_sead_write
************************************************************************/
static UINT32
board_systemflash_write_enable_sead_write(
void *param,
void *data )
{
/* Nothing to do */
return OK;
}
/************************************************************************
* board_systemflash_write_enable_pb1000_write
************************************************************************/
static UINT32
board_systemflash_write_enable_pb1000_write(
void *param,
void *data )
{
/* Revise: There is a write enable on the flash - it is enabled by default
We may want to change to protect the monitor flash */
return OK;
}
/************************************************************************
* board_systemflash_write_disable_atlas_write
************************************************************************/
static UINT32
board_systemflash_write_disable_atlas_write(
void *param,
void *data )
{
REGP(KSEG1BASE, ATLAS_SFWCTRL) = 0;
return OK;
}
/************************************************************************
* board_systemflash_write_disable_sead_write
************************************************************************/
static UINT32
board_systemflash_write_disable_sead_write(
void *param,
void *data )
{
/* Nothing to do */
return OK;
}
/************************************************************************
* board_systemflash_write_disable_pb1000_write
************************************************************************/
static UINT32
board_systemflash_write_disable_pb1000_write(
void *param,
void *data )
{
/* Revise - right now write disable/enable is not used this could be implemented */
return OK;
}
/************************************************************************
* board_brkres_atlas_malta_read
************************************************************************/
static UINT32
board_brkres_atlas_malta_read(
void *param,
void *data )
{
*(UINT32 *)param = REGP(KSEG1BASE, ATLAS_BRKRES) & 0xff;
return OK;
}
/************************************************************************
* board_brkres_atlas_malta_write
************************************************************************/
static UINT32
board_brkres_atlas_malta_write(
void *param,
void *data )
{
REGP(KSEG1BASE, ATLAS_BRKRES) = *(UINT32*)param;
return OK;
}
/************************************************************************
* board_systemflash_write_protected_atlas_read
************************************************************************/
static UINT32
board_systemflash_write_protected_atlas_read(
void *param,
void *data )
{
*(UINT32*)param =
(REGPRD(KSEG1BASE, ATLAS_SWVALUE, S13)) ?
1 : 0;
return OK;
}
/************************************************************************
* board_systemflash_write_protected_sead_read
************************************************************************/
static UINT32
board_systemflash_write_protected_sead_read(
void *param,
void *data )
{
*(UINT32 *)param = 0;
return OK;
}
/************************************************************************
* board_systemflash_write_protected_pb1000_read
************************************************************************/
static UINT32
board_systemflash_write_protected_pb1000_read(
void *param,
void *data )
{
/* Revise - enable/disable is not implemented at this time */
*(UINT32 *)param = 0;
return OK;
}
/************************************************************************
* board_pci_freq_atlas_read
************************************************************************/
static UINT32
board_pci_freq_atlas_read(
void *param,
void *data )
{
*(UINT32 *)param =
REGPRD(KSEG1BASE, ATLAS_JMPRS, PCI33M) ?
33330 : 16670;
return OK;
}
/************************************************************************
* board_pci_freq_malta_read
************************************************************************/
static UINT32
board_pci_freq_malta_read(
void *param,
void *data )
{
switch( REGPRD(KSEG1BASE, MALTA_JMPRS, PCICLK) )
{
case MALTA_JMPRS_PCICLK_10MHZ :
*(UINT32 *)param = 10000;
break;
case MALTA_JMPRS_PCICLK_12_5MHZ :
*(UINT32 *)param = 12500;
break;
case MALTA_JMPRS_PCICLK_16_67MHZ :
*(UINT32 *)param = 16670;
break;
case MALTA_JMPRS_PCICLK_20MHZ :
*(UINT32 *)param = 20000;
break;
case MALTA_JMPRS_PCICLK_25MHZ :
*(UINT32 *)param = 25000;
break;
case MALTA_JMPRS_PCICLK_30MHZ :
*(UINT32 *)param = 30000;
break;
case MALTA_JMPRS_PCICLK_33_33MHZ :
*(UINT32 *)param = 33330;
break;
case MALTA_JMPRS_PCICLK_37_5MHZ :
*(UINT32 *)param = 37500;
break;
default : /* Should not happen */
break;
}
return OK;
}
/************************************************************************
* board_psustby_atlas_write
************************************************************************/
static UINT32
board_psustby_atlas_write(
void *param,
void *data )
{
REGP(KSEG1BASE, ATLAS_PSUSTBY) = ATLAS_PSUSTBY_STBY_GOSTBY;
return OK;
}
/************************************************************************
* board_psustby_sead_write
************************************************************************/
static UINT32
board_psustby_sead_write(
void *param,
void *data )
{
/* Not valid on SEAD-2 */
REGP(KSEG1BASE, SEAD_PSUSTBY) = SEAD_PSUSTBY_STBY_GOSTBY;
return OK;
}
#if 0
/* I don't know why this function does not work, so for now we'll have
* to skip the off command for the Malta board.
*/
/************************************************************************
* board_psustby_malta_write
************************************************************************/
static UINT32
board_psustby_malta_write(
void *param,
void *data )
{
UINT32 base;
SYSCON_read( SYSCON_BOARD_PIIX4_POWER_BASE_ID,
(void *)&base,
sizeof(UINT32) );
base = KSEG1( base );
/* Set suspend type (Suspend to Disk) */
REG16( SWAP_UINT16ADDR_EL( base + PIIX4_PMCNTRL_OFS ) ) =
(PIIX4_PMCNTRL_TYPE_STD << PIIX4_PMCNTRL_TYPE_SHF );
/* Enable suspend */
REG16( SWAP_UINT16ADDR_EL( base + PIIX4_PMCNTRL_OFS ) ) =
( (PIIX4_PMCNTRL_TYPE_STD << PIIX4_PMCNTRL_TYPE_SHF ) |
PIIX4_PMCNTRL_SE_BIT );
return OK;
}
#endif
/************************************************************************
* board_fileflash_write_protected_atlas_malta_read
************************************************************************/
static UINT32
board_fileflash_write_protected_atlas_malta_read(
void *param,
void *data )
{
*(UINT32 *)param =
(REGPRD(KSEG1BASE, ATLAS_STATUS,MFWR)) ?
0 : 1;
return OK;
}
/************************************************************************
* board_monitorflash_write_protected_atlas_malta_read
************************************************************************/
static UINT32
board_monitorflash_write_protected_atlas_malta_read(
void *param,
void *data )
{
*(UINT32 *)param =
(REGPRD(KSEG1BASE, ATLAS_STATUS,MFWR)) ?
1 : 0;
return OK;
}
/************************************************************************
* board_monitorflash_write_protected_pb1000_read
************************************************************************/
static UINT32
board_monitorflash_write_protected_pb1000_read(
void *param,
void *data )
{
/* Revise - write protection is not enabled at this time */
*(UINT32 *)param = 0;
return OK;
}
/************************************************************************
* board_fileflash_write_protected_sead_read
************************************************************************/
static UINT32
board_fileflash_write_protected_sead_read(
void *param,
void *data )
{
*(UINT32 *)param = 0;
return OK;
}
/************************************************************************
* board_fileflash_write_protected_pb1000_read
************************************************************************/
static UINT32
board_fileflash_write_protected_pb1000_read(
void *param,
void *data )
{
/* Revise - write protection is not implemented at this time */
*(UINT32 *)param = 0;
return OK;
}
/************************************************************************
* board_rtc_addr_atlas_read
************************************************************************/
static UINT32
board_rtc_addr_atlas_read(
void *param,
void *data )
{
*(UINT32 *)param = ATLAS_RTCADR;
return OK;
}
/************************************************************************
* board_rtc_addr_malta_read
************************************************************************/
static UINT32
board_rtc_addr_malta_read(
void *param,
void *data )
{
*(UINT32 *)param = MALTA_RTCADR;
return OK;
}
/************************************************************************
* board_rtc_data_atlas_read
************************************************************************/
static UINT32
board_rtc_data_atlas_read(
void *param,
void *data )
{
*(UINT32 *)param = ATLAS_RTCDAT;
return OK;
}
/************************************************************************
* board_rtc_data_malta_read
************************************************************************/
static UINT32
board_rtc_data_malta_read(
void *param,
void *data )
{
*(UINT32 *)param = MALTA_RTCDAT;
return OK;
}
/************************************************************************
* board_eeprom_addr_atlas_read
************************************************************************/
static UINT32
board_eeprom_addr_atlas_malta_read(
void *param,
void *data )
{
*(UINT8 *)param = ATLAS_EEPROM_IICADR_NM24C09;
return OK;
}
/************************************************************************
* board_eeprom_spd_addr_atlas_malta_read
************************************************************************/
static UINT32
board_eeprom_spd_addr_atlas_malta_read(
void *param,
void *data )
{
*(UINT8 *)param = CORE_EEPROM_IICADR_SPD000;
return OK;
}
/************************************************************************
* board_am79c973_base_malta_read
************************************************************************/
static UINT32
board_am79c973_base_malta_read(
void *param,
void *data )
{
/* AMD 79C973 CS and BC registers
* are memory mapped into BAR#1.
*/
#if 0
if( pci_lookup_bar( PCI_VENDID_AMD,
PCI_DEVID_79C973,
0,
PCI_BAR(1),
(void **)param ) )
{
return OK;
}
else
#endif
return ERROR_SYSCON_UNKNOWN_PARAM;
}
/************************************************************************
* com_iic_baudrate_atlas_read
************************************************************************/
static UINT32
com_iic_baudrate_atlas_read(
void *param,
void *data )
{
*(UINT8*)param = ATLAS_IICFREQ_103125HZ;
return OK;
}
/************************************************************************
*
* eeprom_read
* Description :
* -------------
*
* Read eeprom data by calling EEPROM driver
*
* Return values :
* ---------------
*
* Driver return value (OK in case of no error)
*
************************************************************************/
static INT32
eeprom_read(
UINT32 minor, /* Minor device number */
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