hour.v

基于vriloge的数字钟具有调时、分、秒和定时报警功能

module hour(ckhour,Rest,sethour,A,B);
input ckhour,sethour,Rest;
output[3:0]A,B;
reg[3:0]A,B;
wire code;
assign code=ckhour|sethour;
always @(posedge  code or negedge Rest )begin
if(!Rest)begin A=0;B=0;end
else begin A=A+1;end
if(A==9)begin A=0;B=B+1;end
else if(A==4&&B==2)begin A=0;B=0;end
end
endmodule