📄 si2aub4at303.dsp
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/************************************************************************
* *
* File Name : si2aub.dsp *
* Title : Demo Program for SI-to-Audio-Buffer Data Path *
* Date : Jan. 11, 2003 *
* Version : v0.1 *
* Author : Chia-Hong Hsieh (Picc) *
* *
* -------------------------------------------------------------------- *
* Description : *
* *
* This demo program is to show the communication between DSP and *
* 8051 microcontroller. At start-up, DSP will send a response sequence *
* to 8051, and sampling frequency setting to I2S codec is included. *
* Then DSP will force to wait for first (and only one) BSB interrupt *
* to access first BSB data. Finally DSP idles until IRQL1 occurs *
* (Audio-buffer watermarker interrupt). In ISR for IRQL1, DSP will *
* access BSB again and ask 8051 to send next sector of data to BSB. *
* *
* -------------------------------------------------------------------- *
* Version History : *
* *
* Date Ver. Maintainer Change Logs *
* ------------- ---- ------------ --------------------------------- *
* Jan. 11, 2003 0.1 C.H. Hsieh Start coding and first released. *
* *
************************************************************************/
/************************************************************************
* *
* FILE INCLUSIONS *
* *
************************************************************************/
#include "DspCtrlReg4AT303.h"
#include "Macros4AT303.dsp"
/************************************************************************
* *
* REPLACEMENT OR MACRO DECLARATIONS *
* *
************************************************************************/
#define AUBSize 2048
#define AUBTxWmk 256
#define AUBRxWmk AUBSize - AUBTxWmk
/************************************************************************
* *
* DECLARATIONS *
* *
************************************************************************/
/////////////////////////////////////////////////////////////////////////
// //
// Section in Data Memory //
// //
/////////////////////////////////////////////////////////////////////////
.section/data data1;
.var MicroAuxCmd0;
.var MicroAuxDat0;
.var MicroAuxDat1;
.var MicroAuxDat2;
.var BSBWrRdReq = 0;
.var/circ SineWavTable[256] = ".\Source\sinewav.dat";
.var BSBInBuf[256];
/////////////////////////////////////////////////////////////////////////
// //
// Section in Program Memory //
// //
/////////////////////////////////////////////////////////////////////////
/************************************************************************
* *
* PROGRAM BODY *
* *
************************************************************************/
/////////////////////////////////////////////////////////////////////////
// //
// Interrupt Service Routine (ISR) Table //
// //
/////////////////////////////////////////////////////////////////////////
// IRQ11 : Interrupt for reset 0x0000
// ----------------------------------------------------------------------
.section/code IVreset;
RST: jump START; rti; rti; rti;
// IRQ10 : Interrupt for power-down 0x002C
// ----------------------------------------------------------------------
.section/code IVpwrdwn;
PWRDWN: rti; rti; rti; rti;
// IRQ9 : Interrupt for pin "IRQ2_n" 0x0004
// ----------------------------------------------------------------------
.section/code IVirq2;
IRQ2V: jump ISR_DspWkModeChg; rti; rti; rti;
// IRQ8 : Interrupt for pin "IRQL1_n" 0x0008
// ----------------------------------------------------------------------
.section/code IVirql1;
IRQL1: jump ISR_AUBTxWmk; rti; rti; rti;
// IRQ7 : Interrupt for pin "IRQL0_n" 0x000C
// ----------------------------------------------------------------------
.section/code IVirql0;
IRQL0: jump ISR_AUBRxWmk; rti; rti; rti;
// IRQ6 : Interrupt for Sport0 Tx 0x0010
// ----------------------------------------------------------------------
.section/code IVsport0xmit;
SPORT0T: rti; rti; rti; rti;
// IRQ5 : Interrupt for Sport1 Rx 0x0014
// ----------------------------------------------------------------------
.section/code IVsport0recv;
SPORT0R: rti; rti; rti; rti;
// IRQ4 : Interrupt for pin "IRQE_n" 0x0018
// ----------------------------------------------------------------------
.section/code IVirqe;
IRQE: jump ISR_AccessBSB; rti; rti; rti;
// IRQ3 : Interrupt for BDMA 0x001C
// ----------------------------------------------------------------------
.section/code IVbdma;
BDMA: rti; rti; rti; rti;
// IRQ2 : Interrupt for Sport1 Tx or pin "IRQ1_n" 0x0020
// ----------------------------------------------------------------------
.section/code IVirq1;
SPORT1T:
IRQ1V: rti; rti; rti; rti;
// IRQ1 : Interrupt for Sport1 Rx or pin "IRQ0_n" 0x0024
// ----------------------------------------------------------------------
.section/code IVirq0;
SPORT1R:
IRQ0V: jump ISR_AuxCmdDecode; rti; rti; rti;
// IRQ0 : Interrupt for timer 0x0028
// ----------------------------------------------------------------------
.section/code IVtimer;
TIMERV: rti; rti; rti; rti;
/////////////////////////////////////////////////////////////////////////
// //
// Initializing DSP //
// //
/////////////////////////////////////////////////////////////////////////
.section/code program;
START :
icntl = b#00111;
/* |x|||
| ||+--- IRQ0_n sensitivity (0 = level, 1 = edge)
| |+---- IRQ1_n sensitivity (0 = level, 1 = edge)
| +----- IRQ2_n sensitivity (0 = level, 1 = edge)
|
+------- Interrupt nesting (0 = disable, 1 = enable)
*/
imask = b#0000010000;
/* ||||||||||
|||||||||+--- Timer
||||||||+---- SPORT1 Rx or IRQ0_n
|||||||+----- SPORT1 Tx or IRQ1_n
||||||+------ BDMA
|||||+------- IRQE_n
||||+-------- SPORT0 Rx
|||+--------- SPORT0 Tx
||+---------- IRQL0_n
|+----------- IRQL1_n
+------------ IRQ2_n
*/
reset FL0;
i0 = 0; L0 = 0; m0 = 0;
i1 = 0; L1 = 0; m1 = 1;
i2 = 0; L2 = 0; m2 = -1;
i3 = 0; L3 = 0; m3 = 0;
i4 = 0; L4 = 0; m4 = 0;
i5 = 0; L5 = 0; m5 = 1;
i6 = 0; L6 = 0; m6 = -1;
i7 = 0; L7 = 0; m7 = 0;
ar = 0;
ax0 = 0;
dm(BSBWrRdReq) = ax0;
i4 = SineWavTable;
L4 = length(SineWavTable);
/////////////////////////////////////////////////////////////////////////
// //
// Audio-Buffer Control Register and Water-Marker Setting //
// //
/////////////////////////////////////////////////////////////////////////
AUB_SETTUP :
// Setup AUBCTL (Audio-Buffer Control Register)
RegWrite(0x704, b#0010000000000000, ax1);
/* ||||||xxxxxxxx||
|||||| |+--- Rx FIFO empty
|||||| +---- Tx FIFO full
||||||
|||||+------------- Rx FIFO mute
||||+-------------- Tx FIFO mute
|||+--------------- Rx FIFO pointer reset
||+---------------- Tx FIFO pointer reset
|+----------------- Enable Rx FIFO
+------------------ Enable Tx FIFO
*/
RegWrite(0x704, 0, ax1);
// Pre-fill an mount of "dummy" data to pull the pin "IRQL1" down
cntr = 4 * AUBTxWmk;
do DUMMY_FILL until ce;
DUMMY_FILL :
io(0x700) = ax0;
// Setup AUBTXWMK (Audio-Buffer Tx Watermarker)
RegWrite(0x729, AUBTxWmk, ax1);
/////////////////////////////////////////////////////////////////////////
// //
// Response 8051 to indicate that DSP initialization is done //
// //
/////////////////////////////////////////////////////////////////////////
SEND_RSP_TO_MICRO :
// Responce message
// --------------------------------------------------------------
// Byte 0 : 0x02 MSGTYP Message type
// Byte 1 : 0x01 RSPID Response ID
// Byte 2 : 0x01 Fs Sampling Frequency
// 0x01 = 44.1 KHz
// 0x04 = 22.05 KHz
// Byte 3 : 0x00
// Byte 4 : 0x00
// Byte 5 : 0x00
//
RegWrite(0x70D, 0x0201, ax1);
RegWrite(0x70E, 0x0100, ax1);
RegWrite(0x70F, 0x0000, ax1);
// Interrup AUX IRQ to 8051
RegWrite(0x707, b#1000000000000010, ax1);
/* ^^^^^^^^xxxxxx||
| |+--- DSP BSB interrupt to 8051
| |
| +---- DSP AUX interrupt to 8051
|
+-------------- DSP interrupt length
*/
/////////////////////////////////////////////////////////////////////////
// //
// Force DSP to wait for BSB interrupt from 8051 //
// //
/////////////////////////////////////////////////////////////////////////
WAIT_BSB_IRQ :
ax1 = dm(BSBWrRdReq);
ay1 = 0x0001;
none = ax1 xor ay1;
if eq jump DIS_BSB_IRQ;
idle;
jump WAIT_BSB_IRQ;
DIS_BSB_IRQ :
ax1 = 0;
dm(BSBWrRdReq) = ax1;
imask = b#0000000000;
/* ||||||||||
|||||||||+--- Timer
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