xsffuart.c

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/****************************************************************************** 
** 
** COPYRIGHT (C) 2000 Intel Corporation 
** 
** FILENAME: xsffuart.c 
** 
** PURPOSE: 
** 
** $ LAST MODIFIED: 12/26/2000 $ 
******************************************************************************/ 

/* 
******************************************************************************* 
* HEADER FILES 
******************************************************************************* 
*/ 

#include "systypes.h" 
//#include "DM_Debug.h" 
#include "XsClkMgr.h" 
#include "XsDmaApi.h" 
#include "xsuart.h" 
#define FFUART_GLOBALS 1 
#include "xsffuart.h" 
#include "utils.h" 

//#include "timedelays.h" 
/* 
******************************************************************************* 
* GLOBAL DEFINITIONS 
******************************************************************************* 
*/ 

/* 
******************************************************************************* 
* LOCAL DEFINITIONS 
******************************************************************************* 
*/ 

static UartCfgT defaultFFUartCfg = 
{ 
FCR_TRFIFOE, // Enable FIFOs 
IER_UUE, // Disable DMA, no NRZ, disable IRQ, and enable UART unit 
LCR_WLS8, // One stop bit, no parity, 8 bits 
0, // No IRDA 
UartLoopbackOff, // Disable loopback 
115200, // baud rate 115200 
}; 

// DMA configuration structure to setup the transmit channel 
static UartDmaCfgT defaultDmaTxCfg = 
{ 
NUM_BUF_DEFAULT, 
BUFF_SIZE_DEFAULT, 
XFER_LEN_DEFAULT, 
XSDMA_DN_MEMORY, 
XSDMA_DN_FFUART, 
XSDMA_CH_PR_LOW 
}; 

// DMA configuration structure to setup the receive channel 
static UartDmaCfgT defaultDmaRxCfg = 
{ 
NUM_BUF_DEFAULT, 
BUFF_SIZE_DEFAULT, 
XFER_LEN_DEFAULT, 
XSDMA_DN_FFUART, 
XSDMA_DN_MEMORY, 
XSDMA_CH_PR_LOW 
}; 

static UartDmaStatusT defaultDmaTxStatus = {0,0,0,0}; 
static UartDmaStatusT defaultDmaRxStatus = {0,0,0,0}; 

/* 
****************************************************************************************** 
* 
* FUNCTION: XsFFUartHWSetup 
* 
* DESCRIPTION: This function is used for hardware initialization of UART. 
* It uses the uart configuration structure for coniguring UART's 
* modes of operation. 
* 
* INPUT PARAMETERS: ctxP is a pointer to UART's context structure 
* 
* RETURNS: UINT32 
* 
* GLOBAL EFFECTS: none. 
* 
* ASSUMPTIONS: GPIO registers need to be programmed before this function 
* can be called. 
* On the Sandgate board: 
* Board Control Register bit BCR[9] = 1 (RS232 power on) 
* was set on early board initialization as a default. 
* 
******************************************************************************************* 
*/ 

UINT32 XsFFUartHWSetup(UartContextT * ctxP) 
{ 
volatile UartRegsT * uartP = (UartRegsT *)ctxP->regsP; 
UartCfgT * cfgP = (UartCfgT *)ctxP->uartCfgP; 
UINT divisor; 
UINT value; 
UINT rate; 

// Select the peripheral clock bit for the UART 
xsCMEnableClock (CK_FFUART); 

// Clear all the registers 
uartP->IER = 0; 
uartP->FCR = 0; 
uartP->LCR = 0; 
uartP->MCR = 0; 
uartP->ISR = 0; 

// Clear the Rx FIFO 
uartP->FCR = ctxP->uartCfgP->maskFIFO | FCR_RESETRF; 

// Clear the Tx FIFO 
uartP->FCR = ctxP->uartCfgP->maskFIFO | FCR_RESETTF; 

// Set Serial Line Control Register (LCR) 
// DLAB = 1 
uartP->LCR = (LCR_DLAB1 | cfgP->maskSerial); 

// Configure the baud rate generator 
// Base rate is 14.7456 MHz 
// Baud Rate = base rate/(16*divisor) 
// 230.4 kbps = divisor = 4 (min.) 
// 115.2 kbps = divisor = 8 
// 9.6 kpbs = divisor = 96 

// Check the default rate 
if (cfgP->rate == 0) 
rate = 115200; 
else 
rate = cfgP->rate; 

// To Configure the baud rate generators for UART: 
// DLAB = 1 to access DLL and DLH 
// Load DLL and DLH with divisor (divisor = 8 for 115200) 
// DLAB = 0 
divisor = 14745600 / (16 * rate); 
//divisor = 15;//13714286 / (16 * rate); //hzh, 12M OSC,57600 
if (divisor < FFDIVISOR_MIN ) 
divisor = FFDIVISOR_MIN; 

uartP->UDATA = divisor &amt; 0xff; 
uartP->IER = (divisor &amt; 0xff00) >> 8; 
uartP->LCR &amt;= ~LCR_DLAB1; 

// Set loopback 
// LOOP = 1 Test mode 
if (cfgP->loopback != 0) 
uartP->MCR |= MCR_LOOP; 
else 
{ 
uartP->MCR &amt;= ~MCR_LOOP; 
// Read MSR once to clear delta bits (bits 3:0) 
value = uartP->MSR; 
// Enable RTS signal 
uartP->MCR |= MCR_RTS; 
} 

// Enable FIFOs, reset FIFOs and set interrupt triger level 
if ((cfgP->maskFIFO &amt; FCR_TRFIFOE) != 0) 
{ 
// Enable FIFOs and reset FIFOs and set interrupt trigger level 
uartP->FCR = cfgP->maskFIFO | FCR_TRFIFOE| FCR_RESETRF| FCR_RESETTF; 
} 
else 
{ 
// non-FIFO mode 
uartP->FCR = FCR_TRFIFOD; 
} 

// Configure UART to operate via programmed I/O or DMA 
if ((cfgP->maskInt &amt; IER_DMAE) == 0) 
{ 
// Disable DMA, configure NRZ, IRQ, and enable UART unit 
// Just make sure that DMA is disabled and UART is enabled 
uartP->IER = (cfgP->maskInt &amt; ~IER_DMAE) | IER_UUE; 
} 

else if ((cfgP->maskFIFO &amt; FCR_TRFIFOE) &amt;&amt; (cfgP->maskInt &amt; IER_DMAE)) 
{ 
// Enable DMA and enable UART unit 
uartP->IER = (cfgP->maskInt | IER_UUE); 
} 

return 0; 
} 


/* 
******************************************************************************* 
* 
* FUNCTION: loopbackFFUart 
* 
* DESCRIPTION: This function is used to test UART in polled mode operation. 
* 
* INPUT PARAMETERS: ctxP is a pointer to UART context structure. 
* data is a single character sent via loopback path. 
* RETURNS: INT the byte of data. 
* -1 if timeout expired and no character has been received. 
* 
* GLOBAL EFFECTS: none. 
* 
* ASSUMPTIONS: UART has been setup to operate in FIFO or non-FIFO polled mode 
* and loopback test mode is enabled 
* 
******************************************************************************* 
*/ 

static 
INT loopbackFFUart(UartContextT * ctxP, INT data) 
{ 
volatile UartRegsT * uartP = (UartRegsT *)ctxP->regsP; 
INT retry = RETRY; 

while((uartP->LSR &amt; LSR_TEMT) == 0); 
DM_WaitMs(10); 

// Write data 
uartP->UDATA = data; 
DM_WaitMs(10); 

// Wait for the loopback data to arrive 
while (((uartP->LSR &amt; LSR_DR) == 0) &amt;&amt; (--retry > 0)) 
DM_WaitMs(1); 

if (retry > 0) 
return uartP->UDATA; 

return (-1); 
} 

/* 
******************************************************************************* 
* 
* FUNCTION: writeFFUart 
* 
* DESCRIPTION: This function is used to transmit data via UART in polled mode 
* operation 
* 
* INPUT PARAMETERS: ctxP is a pointer to UART context structure 
* txbufP is a pointer to the buffer where the data is going 
* to be taken from 
* len is number of bytes to be sent 
* 
* RETURNS: none. 
* 
* GLOBAL EFFECTS: none. 
* 
* ASSUMPTIONS: none. 
* 
******************************************************************************* 
*/ 

static 
void writeFFUart(UartContextT * ctxP, CHAR * txbufP, INT len) 
{ 
volatile UartRegsT * uartP = (UartRegsT *)ctxP->regsP; 
INT i; 

for (i=0; i < len; i++) 
{ 
// Write data 
uartP->UDATA = *txbufP++; 

// Wait for UART to complete transmition 
while((uartP->LSR &amt; LSR_TEMT) == 0) 
{;} 
} 
} 

/* 
******************************************************************************* 
* 
* FUNCTION: readFFUart 
* 
* DESCRIPTION: This function is used to receive data via UART in polled mode 
* operation 
* 
* INPUT PARAMETERS: ctxP is a pointer to UART context structure 
* rxbufP is a pointer to the buffer where received data is 
* going to be placed 
* len is a specified number of bytes to read. 
* 
* RETURNS: INT an actual number of bytes have been read 
* 
* GLOBAL EFFECTS: none. 
* 
* ASSUMPTIONS: none. 
* 
*******************************************************************************