xvirtual.scr

prolog,人工智能推理程序,运行环境prolog

field("circuitname",str,5,11,22)
field("date",str,7,8,25)
field("name",str,7,39,15)
field("f1",int,11,45,3)
field("f11",int,12,45,3)
field("f12",int,13,45,3)
field("f13",int,14,45,3)
field("f14",int,15,45,3)
field("f15",int,16,45,3)
field("f16",int,17,45,3)
field("f2",int,21,45,3)
field("f21",int,22,45,3)
field("f22",int,23,45,3)
field("f23",int,24,45,3)
field("f24",int,25,45,3)
field("f25",int,26,45,3)
field("f26",int,27,45,3)
field("f27",int,28,45,3)
field("f28",int,29,45,3)
field("f3",int,33,45,3)
field("f31",int,34,45,3)
field("f32",int,35,45,3)
field("f33",int,36,45,3)
field("f34",int,37,45,3)
field("f35",int,38,45,3)
field("f36",int,39,45,3)
field("f37",int,40,45,3)
field("f4",int,44,45,3)
field("f41",int,45,45,3)
field("f42",int,46,45,3)
field("f43",int,47,45,3)
field("f44",int,48,45,3)
field("f45",int,49,45,3)
field("f46",int,50,45,3)
field("f47",int,51,45,3)
field("f48",int,52,45,3)
field("f49",int,53,45,3)
field("f410",int,54,45,3)
txtfield(22,2,38,"2.1    Circuit subdivision       [ 5 ]")
txtfield(23,2,38,"2.2    Testpoints available      [ 5 ]")
txtfield(24,2,38,"2.3    Reduce fan-in/out         [ 5 ]")
txtfield(25,2,38,"2.4    Break counter chains      [ 5 ]")
txtfield(26,2,38,"2.5    Init stored states        [ 5 ]")
txtfield(27,2,38,"2.6    Break feedback loops      [ 5 ]")
txtfield(28,2,38,"2.7    Clock line control        [ 5 ]")
txtfield(29,2,38,"2.8    Sync for analog signals   [ 5 ]")
txtfield(31,9,20,"Actual dig. discrete")
txtfield(33,2,38,"3.     Microprocessor systems    [ 5 ]")
txtfield(34,2,38,"3.1    Oscillator buffering      [ 5 ]")
txtfield(35,2,38,"3.2    Control signals avail.    [ 5 ]")
txtfield(36,2,38,"3.3    Free run break bus loop  [ 5 ]")
txtfield(37,2,38,"3.4    Built in test prog.        [ 5 ]")
txtfield(38,2,38,"3.5    ROM check sequence        [ 5 ]")
txtfield(39,2,38,"3.6    Loopback at interface     [ 5 ]")
txtfield(42,9,21,"Actual microprocessor")
txtfield(44,2,38,"4.     Signature analysis        [ 5 ]")
txtfield(45,2,38,"4.1    Design in from start      [ 5 ]")
txtfield(46,2,38,"4.2    Stimuli signal avail.     [ 5 ]")
txtfield(47,2,38,"4.3    Sync. signals avail.      [ 5 ]")
txtfield(48,2,38,"4.4    No Tri-state levels       [ 5 ]")
txtfield(49,2,38,"4.5    Repetitive sequences        [ 5 ]")
txtfield(50,2,38,"4.6    Break all loops           [ 5 ]")
txtfield(51,2,38,"4.7    Test all states           [ 5 ]")
txtfield(52,2,38,"4.8    From 'kernel' outward     [ 5 ]")
txtfield(53,2,38,"4.9    Test for rest of system   [ 5 ]")
txtfield(54,2,38,"4.10   Documentation updated     [ 5 ]")
txtfield(56,9,16,"Actual signature")
txtfield(60,9,5,"Ratio")
txtfield(55,9,31,"Overall signature         [ 50]")
txtfield(58,9,31,"Overall check list        [155]")
txtfield(59,9,30,"Applicable tests          [30]")
txtfield(40,2,38,"3.7    Sync. to test equip       [ 5 ]")
txtfield(41,9,31,"Overall microprocessor    [ 35]")
txtfield(21,2,38,"2.     Discrete logic design     [ 10]")
txtfield(30,9,31,"Overall dig. discrete     [ 45]")
txtfield(11,2,38,"1.     Mechanical design         [ 5 ]")
txtfield(13,2,38,"1.2    Same direction on parts   [ 5 ]")
txtfield(15,2,38,"1.4    Standardized conn. ass.   [ 5 ]")
txtfield(16,2,38,"1.5    Testpoints in plug        [ 5 ]")
txtfield(17,2,38,"1.6    LSI in socket             [ 5 ]")
txtfield(14,2,38,"1.3    Double placement. pin1    [ 5 ]")
txtfield(12,2,38,"1.1    Testclip access           [ 5 ]")
txtfield(19,9,20,"Actual mech. summary")
txtfield(18,9,31,"Overall mech. summary     [ 30]")
txtfield(2,15,25,"Testability summary sheet")
txtfield(3,18,17,"SMN-02 guidelines")
txtfield(5,2,8,"Circuit:")
txtfield(7,2,5,"Date:")
txtfield(5,35,12,"sheet  1  of")
txtfield(7,35,3,"by:")
windowsize(20,77)