io口.lis

基于AVR实验平台下ATMega128芯片实习作业

                        .module IO口.c
                        .area text(rom, con, rel)
                ;              i -> R16,R17
                        .even
 0000           _delay_1ms::
 0000           ; #include <iom128v.h>
 0000           ; void delay_1ms(void)         
 0000           ;  {
 0000 0027              clr R16
 0002 1127              clr R17
 0004 02C0              xjmp L5
 0006           L2:
 0006           L3:
 0006 0F5F              subi R16,255  ; offset = 1
 0008 1F4F              sbci R17,255
 000A           L5:
 000A           ;    unsigned int i;
 000A           ;    for (i=0;i<2286;i++);
 000A 0E3E              cpi R16,238
 000C E8E0              ldi R30,8
 000E 1E07              cpc R17,R30
 0010 D0F3              brlo L2
 0012           L1:
 0012                   .dbline 0 ; func end
 0012 0895              ret
 0014           ;              i -> R20,R21
 0014           ;              n -> R22,R23
                        .even
 0014           _delay_nms::
 0014 0E940000          xcall push_gset2
 0018 B801              movw R22,R16
 001A           ;   }
 001A           ; void delay_nms(unsigned int n)  
 001A           ; {     unsigned int i=0;
 001A 4427              clr R20
 001C 5527              clr R21
 001E           ;    for (i=0;i<n;i++)
 001E 03C0              xjmp L10
 0020           L7:
 0020 EFDF              xcall _delay_1ms
 0022           L8:
 0022 4F5F              subi R20,255  ; offset = 1
 0024 5F4F              sbci R21,255
 0026           L10:
 0026 4617              cp R20,R22
 0028 5707              cpc R21,R23
 002A D0F3              brlo L7
 002C           L6:
 002C 0E940000          xcall pop_gset2
 0030                   .dbline 0 ; func end
 0030 0895              ret
 0032           ;              a -> <dead>
                        .even
 0032           _main::
 0032           ;    delay_1ms();
 0032           ;   }
 0032           ; void main()  
 0032           ; {unsigned char a;
 0032           ;  DDRA=0x00;
 0032 2224              clr R2
 0034 2ABA              out 0x1a,R2
 0036           ;  DDRC=0X00;
 0036 24BA              out 0x14,R2
 0038           ;  DDRE=0X00;
 0038 22B8              out 0x2,R2
 003A           ;  DDRB=0x01;
 003A 81E0              ldi R24,1
 003C 87BB              out 0x17,R24
 003E           ;  DDRD=0X01;
 003E 81BB              out 0x11,R24
 0040           ;  DDRF=0X01;
 0040 80936100          sts 97,R24
 0044 27C0              xjmp L13
 0046           L12:
 0046           ;  while(1)
 0046           ;  {
 0046           ; if((PINA & 0x01)==0)
 0046 89B3              in R24,0x19
 0048 8170              andi R24,1
 004A 39F4              brne L15
 004C           ; {  PORTB=~PORTB;
 004C 28B2              in R2,0x18
 004E 2094              com R2
 0050 28BA              out 0x18,R2
 0052           ; 
 0052           ;   delay_nms(10);
 0052 0AE0              ldi R16,10
 0054 10E0              ldi R17,0
 0056 DEDF              xcall _delay_nms
 0058           ;   }
 0058 02C0              xjmp L16
 005A           L15:
 005A           ; else PORTB=0XFF;
 005A 8FEF              ldi R24,255
 005C 88BB              out 0x18,R24
 005E           L16:
 005E           ; 
 005E           ; if((PINC& 0x02)==0)
 005E 83B3              in R24,0x13
 0060 8270              andi R24,2
 0062 39F4              brne L17
 0064           ; {
 0064           ;   PORTD=~PORTD;
 0064 22B2              in R2,0x12
 0066 2094              com R2
 0068 22BA              out 0x12,R2
 006A           ;   delay_nms(10);
 006A 0AE0              ldi R16,10
 006C 10E0              ldi R17,0
 006E D2DF              xcall _delay_nms
 0070           ;   }
 0070 02C0              xjmp L18
 0072           L17:
 0072           ; else PORTD=0XFF;
 0072 8FEF              ldi R24,255
 0074 82BB              out 0x12,R24
 0076           L18:
 0076           ; if((PINE & 0x04)==0)
 0076 81B1              in R24,0x1
 0078 8470              andi R24,4
 007A 49F4              brne L19
 007C           ; {
 007C           ;   PORTF=~PORTF;
 007C 20906200          lds R2,98
 0080 2094              com R2
 0082 20926200          sts 98,R2
 0086           ;   delay_nms(10);
 0086 0AE0              ldi R16,10
 0088 10E0              ldi R17,0
 008A C4DF              xcall _delay_nms
 008C           ;   }
 008C 03C0              xjmp L20
 008E           L19:
 008E           ; else PORTF=0XFF;
 008E 8FEF              ldi R24,255
 0090 80936200          sts 98,R24
 0094           L20:
 0094           L13:
 0094 D8CF              xjmp L12
 0096           X0:
 0096           L11:
 0096                   .dbline 0 ; func end
 0096 0895              ret