msp430x21x2_adc10_20.c

MSP430的开发程序的例子+中文注释

//******************************************************************************
//   MSP430F21x2 Demo - ADC10, DTC Sample A0 2-Blk Cont. Mode, AVcc, HF XTAL
//
//   Description: For non-low power applications HF XTAL can source ACLK and be
//   used also for CPU MCLK, as in this example. DTC always uses MCLK for data
//   transfer. Though not required, ADC10 can also clock from HF XTAL as in this
//   example using MCLK.
//   MCLK = ACLK = ADC10CLK = HF XTAL in this example.
//   DTC used to sample A0 with reference to AVcc. Software writes once to
//   ADC10SC to trigger continous sampling. DTC configured to transfer code
//   into two 16-word blocks at RAM 200h - 240h. Mainloop jumps to itself.
//   MCLK times sample period (8x) and conversion (13x). For demostration
//   puspose, ADC10_ISR(DTC) used to set P1.1 at completion of first block
//   transfer, reset at completion of second block transfer. Toggle rate on P1.1
//   is then calculated as MCLK/(21*16*2)
//   //* HF XTAL NOT INSTALLED ON FET *//
//   //* Min Vcc required varies with MCLK frequency - refer to datasheet *//
//
//                MSP430F21x2
//             -----------------
//         /|\|              XIN|-
//          | |                 | HF XTAL (3