dds_project.map.rpt

频率计 等精度频率计 可以用于频率测试的等精度频率计 可用的

+----------------------------------------------------------------------------------------------------------------------------+
; Source assignments for romtab:u5|lpm_rom:lpm_rom_component|altrom:srom|altsyncram:rom_block|altsyncram_5l01:auto_generated ;
+---------------------------------+--------------------+------+--------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                           ;
+---------------------------------+--------------------+------+--------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                            ;
+---------------------------------+--------------------+------+--------------------------------------------------------------+


+----------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: romtab:u5|lpm_rom:lpm_rom_component ;
+------------------------+--------------------+------------------------------------+
; Parameter Name         ; Value              ; Type                               ;
+------------------------+--------------------+------------------------------------+
; LPM_WIDTH              ; 10                 ; Signed Integer                     ;
; LPM_WIDTHAD            ; 10                 ; Signed Integer                     ;
; LPM_NUMWORDS           ; 1024               ; Untyped                            ;
; LPM_ADDRESS_CONTROL    ; registered         ; Untyped                            ;
; LPM_OUTDATA            ; unregistered       ; Untyped                            ;
; LPM_FILE               ; ./data/sin_rom.mif ; Untyped                            ;
; DEVICE_FAMILY          ; Cyclone            ; Untyped                            ;
; AUTO_CARRY_CHAINS      ; ON                 ; AUTO_CARRY                         ;
; IGNORE_CARRY_BUFFERS   ; OFF                ; IGNORE_CARRY                       ;
; AUTO_CASCADE_CHAINS    ; ON                 ; AUTO_CASCADE                       ;
; IGNORE_CASCADE_BUFFERS ; OFF                ; IGNORE_CASCADE                     ;
+------------------------+--------------------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Processing started: Sun May 11 20:12:50 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off DDS_Project -c DDS_Project
Info: Found 2 design units, including 1 entities, in source file sum32.vhd
    Info: Found design unit 1: sum32-art
    Info: Found entity 1: sum32
Info: Found 2 design units, including 1 entities, in source file reg1.vhd
    Info: Found design unit 1: reg1-art
    Info: Found entity 1: reg1
Info: Found 2 design units, including 1 entities, in source file reg2.vhd
    Info: Found design unit 1: reg2-art
    Info: Found entity 1: reg2
Info: Found 2 design units, including 1 entities, in source file adder32.vhd
    Info: Found design unit 1: adder32-art
    Info: Found entity 1: adder32
Info: Found 2 design units, including 1 entities, in source file dds.vhd
    Info: Found design unit 1: dds-art
    Info: Found entity 1: dds
Info: Found 2 design units, including 1 entities, in source file romtab.vhd
    Info: Found design unit 1: romtab-arc_rom
    Info: Found entity 1: romtab
Info: Elaborating entity "DDS" for the top level hierarchy
Info: Elaborating entity "sum32" for hierarchy "sum32:u1"
Warning (10492): VHDL Process Statement warning at sum32.vhd(40): signal "temp" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Info: Elaborating entity "reg1" for hierarchy "reg1:u2"
Info: Elaborating entity "adder32" for hierarchy "adder32:u3"
Warning (10492): VHDL Process Statement warning at adder32.vhd(35): signal "b" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Info: Elaborating entity "reg2" for hierarchy "reg2:u4"
Info: Elaborating entity "romtab" for hierarchy "romtab:u5"
Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/lpm_rom.tdf
    Info: Found entity 1: lpm_rom
Info: Elaborating entity "lpm_rom" for hierarchy "romtab:u5|lpm_rom:lpm_rom_component"
Info: Elaborated megafunction instantiation "romtab:u5|lpm_rom:lpm_rom_component"
Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altrom.tdf
    Info: Found entity 1: altrom
Info: Elaborating entity "altrom" for hierarchy "romtab:u5|lpm_rom:lpm_rom_component|altrom:srom"
Warning: Assertion warning: altrom does not support Cyclone device family -- attempting best-case memory conversions, but power-up states will be different for Cyclone devices
Info: Elaborated megafunction instantiation "romtab:u5|lpm_rom:lpm_rom_component|altrom:srom", which is child of megafunction instantiation "romtab:u5|lpm_rom:lpm_rom_component"
Info: Instantiated megafunction "romtab:u5|lpm_rom:lpm_rom_component" with the following parameter:
    Info: Parameter "lpm_width" = "10"
    Info: Parameter "lpm_widthad" = "10"
    Info: Parameter "lpm_address_control" = "registered"
    Info: Parameter "lpm_indata" = "registered"
    Info: Parameter "lpm_outdata" = "unregistered"
    Info: Parameter "lpm_file" = "./data/sin_rom.mif"
Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/altsyncram.tdf
    Info: Found entity 1: altsyncram
Info: Elaborating entity "altsyncram" for hierarchy "romtab:u5|lpm_rom:lpm_rom_component|altrom:srom|altsyncram:rom_block"
Info: Elaborated megafunction instantiation "romtab:u5|lpm_rom:lpm_rom_component|altrom:srom|altsyncram:rom_block", which is child of megafunction instantiation "romtab:u5|lpm_rom:lpm_rom_component"
Info: Instantiated megafunction "romtab:u5|lpm_rom:lpm_rom_component" with the following parameter:
    Info: Parameter "lpm_width" = "10"
    Info: Parameter "lpm_widthad" = "10"
    Info: Parameter "lpm_address_control" = "registered"
    Info: Parameter "lpm_indata" = "registered"
    Info: Parameter "lpm_outdata" = "unregistered"
    Info: Parameter "lpm_file" = "./data/sin_rom.mif"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_5l01.tdf
    Info: Found entity 1: altsyncram_5l01
Info: Elaborating entity "altsyncram_5l01" for hierarchy "romtab:u5|lpm_rom:lpm_rom_component|altrom:srom|altsyncram:rom_block|altsyncram_5l01:auto_generated"
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[0] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[1] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[2] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[3] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[4] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[5] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[6] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[7] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[8] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer romtab:u5|lpm_rom:lpm_rom_component|otri[9] feeding logic, open-drain buffer, or output pin
Info: Implemented 193 device resources after synthesis - the final resource count might be different
    Info: Implemented 67 input pins
    Info: Implemented 10 output pins
    Info: Implemented 106 logic cells
    Info: Implemented 10 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 13 warnings
    Info: Allocated 166 megabytes of memory during processing
    Info: Processing ended: Sun May 11 20:12:53 2008
    Info: Elapsed time: 00:00:03