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📄 isp_test.lst

📁 关于isp的一个测试程序
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A51 MACRO ASSEMBLER  ISP_TEST                                                             06/13/2005 14:38:19 PAGE     1


MACRO ASSEMBLER A51 V6.12
OBJECT MODULE PLACED IN ISP_Test.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE ISP_Test.asm SET(SMALL) DEBUG EP

LOC  OBJ            LINE     SOURCE

                       1     ;LPC9xx family boot program for IN-SYSTEM PROGRAMMING
                       2     ;
                       3     ;copyright Philips Semiconductors 2003, 2004
                       4     
                       5     ;FILENAME:         LPC2_ISP_8K_V04.TXT
                       6     ;CODE TYPE:         ISP
                       7     ;VERSION:         04
                       8     ;RELEASE DATE:         30 Jul 04
                       9     ;CODE MEMORY SIZE:     8KB
                      10     ;CODE ADDRESS RANGE:     1E00h - 1FFFh
                      11     ;BOOT VECTOR:         1F00h
                      12     ;USES IAP VERSION:     04
                      13     ;USES IAP ENTRY:     FF03h
                      14     ;Author:        Bill Houghton
                      15     ;
                      16     ;Features:
                      17     ;
                      18     ;Version 4:
                      19     ;
                      20     ;- Fixes bug: CCP command was assigned the same value as the write sec 2 security byte.
                      21     ;
                      22     ;Version 3:
                      23     ;
                      24     ;- Support added for hardware code corruption (BOOTSTAT.7:5) - valid key needed for write o
                             perations
                      25     ;- Fixes bug in direct load of UART baud rate command.
                      26     ;- Fixes Port 0 init to only program P1 modes for TxD & RxD pins. 
                      27     ;
                      28     ;Version 2:
                      29     ;- Modifieds WDL and WDCON to select longest WDT timeout & provides periodic feeding.
                      30     ;- Program user code page has option to use either IDATA or XDATA (if available on chip).
                      31     ;- Software code corruption protection - valid key needed for write operations 
                      32     ;- Code traps (software reset) added to start of ISP & IAP sections
                      33     ;
                      34     ;Version 1:
                      35     ;- Includes standard features originally released with LPC932.
                      36     
                      37     
                      38     
                      39     
                      40     ;********************************************************************************
                      41     ;************************* SET DEVICE CODE MEMORY SIZE HERE *********************
                      42     ;********************************************************************************
                      43     
                      44     ;This program is used to create source code for devices with different code memory
                      45     ;sizes. To set the size of the device, "comment-out" the two devices sizes that do
                      46     ;not match leaving only the appropriate device size.
                      47     
  2000                48     MEM_TOP        EQU    2000H    ;use for 8KB code memory devices
                      49     ;MEM_TOP    EQU    1000H    ;use for 4KB code memory devices
                      50     ;MEM_TOP    EQU    800H    ;use for 2KB code memory devices
                      51     
                      52     ;code memory space for LPC2
                      53     ;
                      54     ;block 0, 1KB, 0000h - 03FFh
                      55     ;block 1, 1KB, 0400h - 07FFh
                      56     ;block 2, 1KB, 0800h - 0BFFh
                      57     ;block 3, 1KB, 0C00h - 0FFFh
A51 MACRO ASSEMBLER  ISP_TEST                                                             06/13/2005 14:38:19 PAGE     2

                      58     ;block 4, 1KB, 1000h - 13FFh
                      59     ;block 5, 1KB, 1400h - 17FFh
                      60     ;block 6, 1KB, 1800h - 1BFFh
                      61     ;block 7, 1KB, 1C00h - 1FFFh
                      62     
                      63     ;Bootrom, 240 bytes , FF00h - FFEF
                      64     
                      65     
  0000                66     PGMU    EQU    00
  0001                67     VRD    EQU    01               
  0002                68     MWR    EQU    02               
  0003                69     MRD    EQU    03               
  0004                70     ERS    EQU    04               
  0005                71     SCRC    EQU    05               
  0006                72     GCRC    EQU    06               
  0007                73     RUSR    EQU    07
  00D1                74     F1    EQU    0D1H
  00C1                75     WDL    EQU    0C1H
  00A7                76     WDCON    EQU    0A7H
  00C2                77     WFEED1    EQU    0C2H
  00C3                78     WFEED2    EQU    0C3H
  00E4                79     FMCON    EQU    0E4H
  00E5                80     FMDATA    EQU    0E5H
                      81                    
  FF03                82     PGM_MTP    EQU    0FF03H        
                      83     
                      84     
                      85     ;byte variables definition
                      86     
----                  87     DSEG    AT    30H
                      88     
0030                  89     ADR0:        DS    1        ;low byte of address
0031                  90     ADR1:        DS    1        ;high byte of address
0032                  91     CHKSUM:    DS    1        ;record checksum
0033                  92     NBYTES:    DS    1        ;number of bytes in record
0034                  93     RTYPE:    DS    1        ;record type
0035                  94     TMP3:        DS    1        ;temporary storage
                      95     
0036                  96     UCFG1:    DS    1    ;User configuration register 1
0037                  97     UCFG2:    DS    1    ;User configuration register 2
0038                  98     BOOTV:    DS    1    ;Boot Vector
0039                  99     STATBY:    DS    1    ;Status Byte
003A                 100     FCFG1:    DS    1    ;Factory config 1, read only
003B                 101     FCFG2:    DS    1    ;Factory config 2, read only 
003C                 102     DERIV:    DS    1    ;Derivative
003D                 103     TMEB_v:    DS    1    ;TMEB
003E                 104     SEC0:        DS    1    ;Security byte 0
003F                 105     SEC1:        DS    1    ;Security byte 1
0040                 106     SEC2:        DS    1    ;Security byte 2
0041                 107     SEC3:        DS    1    ;Security byte 3
0042                 108     SEC4:        DS    1    ;Security byte 4
0043                 109     SEC5:        DS    1    ;Security byte 5
0044                 110     SEC6:        DS    1    ;Security byte 6
0045                 111     SEC7:        DS    1    ;Security byte 7
0046                 112     MF_ID:        DS    1    ;Signature byte 0 (mfg id)
0047                 113     ID_1:        DS    1    ;Signature byte 1 (device id)
0048                 114     ID_2:        DS    1    ;Signature byte 2 (derivative id)
                     115     
0049                 116     CRC0:        DS    1    ;CRC data
004A                 117     CRC1:        DS    1    ;CRC data
004B                 118     CRC2:        DS    1    ;CRC data
004C                 119     CRC3:        DS    1    ;CRC data
                     120     
                     121     ;ISEG    AT    0FFH
                     122     
                     123     ;KEY:        DS    1    ;IAP request key
A51 MACRO ASSEMBLER  ISP_TEST                                                             06/13/2005 14:38:19 PAGE     3

  00FF               124     KEY data 0xFF
                     125     
                     126     ;*************** equates list       ************************
                     127     
  0036               128     CONFB        EQU    UCFG1        ;start of CONF register space
  0091               129     RXDn        EQU    P1.1        ;RxD pin
  0004               130     ISP_VER        EQU    04H        ;ISP version id = 4
  008E               131     AUXR        EQU    08EH        ;auxr register
  00A2               132     AUXR1        EQU    0A2H        ;auxr 1 register
  0008               133     SRST        EQU    8H        ;OR mask for software reset bit
  008F               134     TAMOD        EQU    8FH        ;timer aux mode register
  0091               135     P1M1        EQU    91H
  0092               136     P1M2        EQU    92H
  00BE               137     BRGR0        EQU    0BEH    
  00BF               138     BRGR1        EQU    0BFH
  00BD               139     BRGCON        EQU    0BDH    
                     140     
  00E0               141     OI        EQU    ACC.0        ;operation aborted by interrupt 
  00E1               142     SV        EQU    ACC.1        ;security violation
  00E2               143     HVE        EQU    ACC.2        ;high voltage error 
                     144     
  00FF               145     SBVAL        EQU    0FFH        ;status byte default value
  00FC               146     BVVAL        EQU    0FCH        ;boot vector default value
  0080               147     DBYTES        EQU    80H        ;start of RAM buffer for hex string
  0096               148     KEYVAL        EQU    96H        ;IAP request key value
  0008               149     SET_WE        EQU    08H        ;enable writing
                     150     
----                 151     CSEG    AT    MEM_TOP-512        ;Should be 1E00h
                     152     
1E00                 153     RESET:
1E00 43A208          154         ORL    AUXR1,#SRST    ;set the software reset bit
                     155     ;*********************************************************
                     156     ;
                     157     ;    START OF PROGRAM
                     158     ;
                     159     ;*********************************************************
                     160     
                     161     ;    First, we need to measure the baud rate of
                     162     ;the host in terms of our own clock speed. This
                     163     ;measurement can be made on a start bit provided
                     164     ;the first data bit is a logical one. A capital "U"
                     165     ;is a good choice since it has alternating 1s and 0s . 
                     166     ;    Our measurement uses T1 which is clocked at
                     167     ;fosc/2, which is the same as when T1 is used as 
                     168     ;a baud rate generator. The UART uses 16x sampling
                     169     ;so we need to divide the T1 count by 16. Even
                     170     ;though the timer will be used in the 8-bit
                     171     ;auto-reload mode for baud rate generation, non-reload
                     172     ;16-bit mode is used for the measurement to give
                     173     ;more clock counts for slower baud rates. This number
                     174     ;will be divided by 16. This method allows the timer
                     175     ;to count up to 4096 counts (16 x 256). The timer
                     176     ;counts up towards zero thus counts loaded into the
                     177     ;timer counter need to be negative numbers. A two's
                     178     ;complement of the adjusted count produces this result.
                     179     
                     180     
1E03                 181     INIT:
1E03 D1E5            182         ACALL    I_WDT        ;
1E05 5391FC          183         ANL    91H,#0FCH    ;RxD = quasi-bi
1E08 439201          184         ORL    92H,#01H     ;TxD = push-pull
1E0B 7590FF          185         MOV    P1,#0FFH    ;
                     186     
1E0E 758920          187             MOV    TMOD,#20H    ;8-bit auto-reload mode
1E11 53BAFA          188             ANL    0BAH,#0FAH
1E14 E4              189             CLR    A
A51 MACRO ASSEMBLER  ISP_TEST                                                             06/13/2005 14:38:19 PAGE     4

1E15 F5BD            190             MOV    0BDH,A
1E17 759850          191         MOV    SCON,#50H    ;init UART 8-bit variable, TI=0 RI=0
1E1A 75BEF0          192             MOV    0BEH,#0F0H
1E1D 75BF02          193             MOV    0BFH,#02H
1E20 75BD03          194             MOV    0BDH,#03H
                     195     
1E23                 196     QRZ:    
1E23 D188            197             ACALL    ECHO        ;wait until character is rcv'd & get it
1E25 B455FB          198         CJNE    A,#'U',QRZ    ;check to see if uppercase "U"
1E28 D174            199     W1:     ACALL    CO
                     200     
1E2A                 201     LCMD:
1E2A 7D00            202         MOV    R5,#0    ;begin record... zero checksum
1E2C D188            203         ACALL    ECHO        ;get first char and echo
1E2E B43AF7          204             CJNE    A,#':',W1    ;record starts with ':' char
1E31 D161            205         ACALL    GET2        ;get the number of bytes in record
1E33 853533          206         MOV    33H,35H    ;and save
1E36 D161            207         ACALL    GET2        ;get MSB of load address
1E38 853531          208         MOV    31H,35H    ;and save
1E3B D161            209         ACALL    GET2        ;get LSB of load address
1E3D 853530          210         MOV    30H,35H    ;and save it
1E40 D161            211         ACALL    GET2        ;get record type
1E42 853534          212         MOV    34H,35H    ;and save it
1E45 E533            213         MOV    A,33H    ;else, more than
1E47 FA              214         MOV    R2,A    
1E48 6009            215         JZ    EOR        ;zero data bytes ?
1E4A 7980            216         MOV    R1,#80H    ;pointer for data bytes
1E4C D161            217     LDATA:    ACALL    GET2        ;get data byte
1E4E A735            218         MOV    @R1,35H    ;store it
1E50 09              219         INC    R1        ;and bump up the pointer    
1E51 DAF9            220         DJNZ    R2,LDATA    ;repeat if more bytes in record
1E53                 221     EOR:
1E53 ED              222         MOV    A,R5        ;
1E54 FC              223         MOV    R4,A        ;save calculated checksum
1E55 D161            224         ACALL    GET2        ;get the checksum byte
1E57 EC              225         MOV    A,R4        ;and compare with calculated checksum byte
1E58 B53504          226         CJNE    A,35H,CHKERR    ;recv'd & calc'd chksums match ?
1E5B 7980            227         MOV    R1,#80H    ;pointer for data
1E5D C1A5            228         AJMP    PROCESS        ;YES, process command
                     229     
1E5F                 230     CHKERR:
                     231     ;    MOV    A,#'X'
1E5F E124            232         AJMP    RSPND1
                     233     
1E61 D188            234     GET2:    ACALL    ECHO        ;get first char of length
1E63 D190            235         ACALL    A2HEX        ;convert to hex
1E65 C4              236         SWAP    A        ;set in high nibble
1E66 F535            237         MOV    35H,A        ;store in NBYTES

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