mainstoneii.h

更新GPS FIRMWARE 查詢GPS FIRMWARE版本

/*
typedef struct
{
    UINT8    DRCR1;         
} CPLD_DRCR1_REGS, *P_CPLD_DRCR1_REGS;
*/
#define CF_SLOT0_RESET			(1<<7)	//1=reset enable, 0=reset disable
#define CF_SLOT1_RESET			(1<<6)	//1=reset enable, 0=reset disable
#define nPCM_CODEC_RESET		(1<<5) 	//0=reset enable, 1=reset disable
#define BLUETOOTH_RESET			(1<<4)	//1=reset enable, 0=reset disable
#define GPS_RESET				(1<<3)	//1=reset enable, 0=reset disable
#define SCAN_RESET				(1<<2)	//1=reset enable, 0=reset disable
#define RFID_RESET				(1<<1)	//1=reset enable, 0=reset disable
#define SYNC_RESET				(1<<0)	//1=reset enable, 0=reset disable

//Device Reset Control Register 2
/*
typedef struct
{
    UINT8    DRCR2;         
} CPLD_DRCR2_REGS, *P_CPLD_DRCR2_REGS;
*/
#define nCAMERA_RESET			(1<<5)	//0=reset enable, 1=reset disable
#define GSM_EMG_RESET			(1<<4)	//1=reset enable, 0=reset disable
#define GSM_UART_RESET			(1<<3)	//1=reset enable, 0=reset disable
#define DEBUG_BOARD_RESET		(1<<2)	//1=reset enable, 0=reset disable
#define DEBUG_LAN_RESET			(1<<1)	//1=reset enable, 0=reset disable
#define nFINGER_RESET			(1<<0)	//0=reset enable, 1=reset disable

//Keypad Pressing Status and Single Key Register
/*
typedef struct
{
    UINT8    KPSSKR;         
} CPLD_KPSSKR_REGS, *P_CPLD_KPSSKR_REGS;
*/
#define KEY_PRESS_STATUS		(1<<7)	//0=single key, 1=multi key
#define COLUMN_PRESS_BIT2		(1<<6)
#define COULMN_PRESS_BIT1		(1<<5)
#define COLUMN_PRESS_BIT0		(1<<4)
	#define COLUMN_PRESS_BIT_MSK		(0x70)	//Bit[6..4]=000, Column 0 pressed
												//Bit[6..4]=001, Column 1 pressed
												//~~~~
												//Bit[6..4]=111, Column 7 pressed
#define ROW_PRESS_BIT2			(1<<2)
#define ROW_PRESS_BIT1			(1<<1)
#define ROW_PRESS_BIT0			(1<<0)
	#define ROW_PRESS_BIT_MSK			(0x07)	//Bit[2..0]=000, Row 0 pressed
												//Bit[2..0]=001, Row 1 pressed
												//~~~
												//Bit[2..0]=111, Row 7 pressed												
//Multi Key Column 0 Control Register
/*
typedef struct
{
    UINT8    MKC0;         
} CPLD_MKC0_REGS, *P_CPLD_MKC0_REGS;
*/
#define COLUMN0_ROW7			(1<<7)	//0=released, 1=pressed
#define COLUMN0_ROW6			(1<<6)	//0=released, 1=pressed
#define COLUMN0_ROW5			(1<<5)	//0=released, 1=pressed
#define COLUMN0_ROW4			(1<<4)	//0=released, 1=pressed
#define COLUMN0_ROW3			(1<<3)	//0=released, 1=pressed
#define COLUMN0_ROW2			(1<<2)	//0=released, 1=pressed
#define COLUMN0_ROW1			(1<<1)	//0=released, 1=pressed
#define COLUMN0_ROW0			(1<<0)	//0=released, 1=pressed
	#define COLUMN0_ROWX_MSK		(0xFF)	//

//Multi key Column 1 Control Register
/*
typedef struct
{
    UINT8    MKC1;         
} CPLD_MKC1_REGS, *P_CPLD_MKC1_REGS;
*/
#define COLUMN1_ROW7			(1<<7)	//0=released, 1=pressed
#define COLUMN1_ROW6			(1<<6)	//0=released, 1=pressed
#define COLUMN1_ROW5			(1<<5)	//0=released, 1=pressed
#define COLUMN1_ROW4			(1<<4)	//0=released, 1=pressed
#define COLUMN1_ROW3			(1<<3)	//0=released, 1=pressed
#define COLUMN1_ROW2			(1<<2)	//0=released, 1=pressed
#define COLUMN1_ROW1			(1<<1)	//0=released, 1=pressed
#define COLUMN1_ROW0			(1<<0)	//0=released, 1=pressed
	#define COLUMN1_ROWX_MSK		(0xFF)	//

//Multi Key Column 2 Control Register
/*
typedef struct
{
    UINT8    MKC2;         
} CPLD_MKC2_REGS, *P_CPLD_MKC2_REGS;
*/
#define COLUMN2_ROW7			(1<<7)	//0=released, 1=pressed
#define COLUMN2_ROW6			(1<<6)	//0=released, 1=pressed
#define COLUMN2_ROW5			(1<<5)	//0=released, 1=pressed
#define COLUMN2_ROW4			(1<<4)	//0=released, 1=pressed
#define COLUMN2_ROW3			(1<<3)	//0=released, 1=pressed
#define COLUMN2_ROW2			(1<<2)	//0=released, 1=pressed
#define COLUMN2_ROW1			(1<<1)	//0=released, 1=pressed
#define COLUMN2_ROW0			(1<<0)	//0=released, 1=pressed
	#define COLUMN2_ROWX_MSK		(0xFF)	//

//Multi Key Column 3 Control Register
/*
typedef struct
{
    UINT8    MKC3;         
} CPLD_MKC3_REGS, *P_CPLD_MKC3_REGS;
*/
#define COLUMN3_ROW7			(1<<7)	//0=released, 1=pressed
#define COLUMN3_ROW6			(1<<6)	//0=released, 1=pressed
#define COLUMN3_ROW5			(1<<5)	//0=released, 1=pressed
#define COLUMN3_ROW4			(1<<4)	//0=released, 1=pressed
#define COLUMN3_ROW3			(1<<3)	//0=released, 1=pressed
#define COLUMN3_ROW2			(1<<2)	//0=released, 1=pressed
#define COLUMN3_ROW1			(1<<1)	//0=released, 1=pressed
#define COLUMN3_ROW0			(1<<0)	//0=released, 1=pressed
	#define COLUMN3_ROWX_MSK		(0xFF)	//

//Multi Key Column 4 Control Register
/*
typedef struct
{
    UINT8    MKC4;         
} CPLD_MKC4_REGS, *P_CPLD_MKC4_REGS;
*/
#define COLUMN4_ROW7			(1<<7)	//0=released, 1=pressed
#define COLUMN4_ROW6			(1<<6)	//0=released, 1=pressed
#define COLUMN4_ROW5			(1<<5)	//0=released, 1=pressed
#define COLUMN4_ROW4			(1<<4)	//0=released, 1=pressed
#define COLUMN4_ROW3			(1<<3)	//0=released, 1=pressed
#define COLUMN4_ROW2			(1<<2)	//0=released, 1=pressed
#define COLUMN4_ROW1			(1<<1)	//0=released, 1=pressed
#define COLUMN4_ROW0			(1<<0)	//0=released, 1=pressed
	#define COLUMN4_ROWX_MSK		(0xFF)	//

//Multi Key Column 5 Control Register
/*
typedef struct
{
    UINT8    MKC5;         
} CPLD_MKC5_REGS, *P_CPLD_MKC5_REGS;
*/
#define COLUMN5_ROW7			(1<<7)	//0=released, 1=pressed
#define COLUMN5_ROW6			(1<<6)	//0=released, 1=pressed
#define COLUMN5_ROW5			(1<<5)	//0=released, 1=pressed
#define COLUMN5_ROW4			(1<<4)	//0=released, 1=pressed
#define COLUMN5_ROW3			(1<<3)	//0=released, 1=pressed
#define COLUMN5_ROW2			(1<<2)	//0=released, 1=pressed
#define COLUMN5_ROW1			(1<<1)	//0=released, 1=pressed
#define COLUMN5_ROW0			(1<<0)	//0=released, 1=pressed
	#define COLUMN5_ROWX_MSK		(0xFF)	//

//Multi Key Column 6 Control Register
/*
typedef struct
{
    UINT8    MKC6;         
} CPLD_MKC6_REGS, *P_CPLD_MKC6_REGS;
*/
#define COLUMN6_ROW7			(1<<7)	//0=released, 1=pressed
#define COLUMN6_ROW6			(1<<6)	//0=released, 1=pressed
#define COLUMN6_ROW5			(1<<5)	//0=released, 1=pressed
#define COLUMN6_ROW4			(1<<4)	//0=released, 1=pressed
#define COLUMN6_ROW3			(1<<3)	//0=released, 1=pressed
#define COLUMN6_ROW2			(1<<2)	//0=released, 1=pressed
#define COLUMN6_ROW1			(1<<1)	//0=released, 1=pressed
#define COLUMN6_ROW0			(1<<0)	//0=released, 1=pressed
	#define COLUMN6_ROWX_MSK		(0xFF)	//

//Multi key Column 7 Control Register
/*
typedef struct
{
    UINT8    MKC7;         
} CPLD_MKC7_REGS, *P_CPLD_MKC7_REGS;
*/
#define COLUMN7_ROW7			(1<<7)	//0=released, 1=pressed
#define COLUMN7_ROW6			(1<<6)	//0=released, 1=pressed
#define COLUMN7_ROW5			(1<<5)	//0=released, 1=pressed
#define COLUMN7_ROW4			(1<<4)	//0=released, 1=pressed
#define COLUMN7_ROW3			(1<<3)	//0=released, 1=pressed
#define COLUMN7_ROW2			(1<<2)	//0=released, 1=pressed
#define COLUMN7_ROW1			(1<<1)	//0=released, 1=pressed
#define COLUMN7_ROW0			(1<<0)	//0=released, 1=pressed
	#define COLUMN7_ROWX_MSK		(0xFF)	//

//Keypad LED Control Register
/*
typedef struct
{
    UINT8    KLCR;
} CPLD_KLCR_REGS, *P_CPLD_KLCR_REGS;
*/
#define KEYPAD_BACKLIGHT		(1<<2)	//0=disable, 1=enable
#define KEYPAD_LED2				(1<<1)	//0=disable, 1=enable
#define KEYPAD_LED1				(1<<0)	//0=disable, 1=enable

//Keypad ROW 0 Wakeup Key Enable Register
/*
typedef struct
{
    UINT8    KR0_WKER;
} CPLD_KR0_WKER_REGS, *P_CPLD_KR0_WKER_REGS;
*/
#define WAKEUP_ROW0_COLUMN7		(1<<7)	//0=disable, 1=enable
#define WAKEUP_ROW0_COLUMN6		(1<<6)	//0=disable, 1=enable
#define WAKEUP_ROW0_COLUMN5		(1<<5)	//0=disable, 1=enable
#define WAKEUP_ROW0_COLUMN4		(1<<4)	//0=disable, 1=enable
#define WAKEUP_ROW0_COLUMN3		(1<<3)	//0=disable, 1=enable
#define WAKEUP_ROW0_COLUMN2		(1<<2)	//0=disable, 1=enable
#define WAKEUP_ROW0_COLUMN1		(1<<1)	//0=disable, 1=enable
#define WAKEUP_ROW0_COLUMN0		(1<<0)	//0=disable, 1=enable

//Keypad ROW 1 Wakeup Key Enable Register
/*
typedef struct
{
    UINT8    KR1_WKER;
} CPLD_KR1_WKER_REGS, *P_CPLD_KR1_WKER_REGS;
*/
#define WAKEUP_ROW1_COLUMN7		(1<<7)	//0=disable, 1=enable
#define WAKEUP_ROW1_COLUMN6		(1<<6)	//0=disable, 1=enable
#define WAKEUP_ROW1_COLUMN5		(1<<5)	//0=disable, 1=enable
#define WAKEUP_ROW1_COLUMN4		(1<<4)	//0=disable, 1=enable
#define WAKEUP_ROW1_COLUMN3		(1<<3)	//0=disable, 1=enable
#define WAKEUP_ROW1_COLUMN2		(1<<2)	//0=disable, 1=enable
#define WAKEUP_ROW1_COLUMN1		(1<<1)	//0=disable, 1=enable
#define WAKEUP_ROW1_COLUMN0		(1<<0)	//0=disable, 1=enable

//Keypad ID Status Register
/*
typedef struct
{
    UINT8    KIDS;
} CPLD_KIDS_REGS, *P_CPLD_KIDS_REGS;
*/
#define KEYPAD_ID_BIT3			(1<<3)
#define KEYPAD_ID_BIT2			(1<<2)
#define KEYPAD_ID_BIT1			(1<<1)
#define KEYPAD_ID_BIT0			(1<<0)
	#define KEYPAD_ID_BIT_MSK		(0x0F)
	
/*
//Interrupt Status Control Register 1
typedef struct
{
    UINT8    ISCR1;
} CPLD_ISCR1_REGS, *P_CPLD_ISCR1_REGS;
*/
#define nCF_SLOT0_IRQ			(1<<7)	//0=active, 1=inactive
#define nCF_SLOT0_STSCHG		(1<<6)	//0=active, 1=inactive
#define nCF_SLOT1_IRQ			(1<<5)	//0=active, 1=inactive
#define nCF_SLOT1_STSCHG		(1<<4)	//0=active, 1=inactive
#define nHEADPHONE_DETECT		(1<<3)	//0=active,	1=inactive
#define nUSB_DETECT				(1<<2)	//0=active, 1=inactive
#define nREAD_2D_GOOD			(1<<1)	//0=Read ok, 1=?
#define nDEBUG_IN				(1<<0)	//0=active, 1=inactive

/*
//Interrupt Status Control Register 2	(Read Only)
typedef struct
{
    UINT8    ISCR2;
} CPLD_ISCR2_REGS, *P_CPLD_ISCR2_REGS;
*/
#define nSYNC_UART_INT_STATUS	(1<<7)	//0=inactive, 1=active
#define nSYNC_UART_DCD_STATUS	(1<<6)	//0=active, 1=inactive
#define nSYNC_UART_RI_STATUS	(1<<5)	//0=active, 1=inactive
#define nSCANNER_INT_STATUS		(1<<4)	//0=inactive, 1=active
#define nSCANNER_POWER_STATUS	(1<<3)	//0=Normal, 1=active (in power down mode)
#define nGSM_UART1_INT_STATUS	(1<<2)	//0=inactive, 1=active
#define nGSM_UART2_INT_STATUS	(1<<1)	//0=inactive, 1=active
#define nGSM_MODULE_RI_STATUS	(1<<0)	//0=active, 1=inactive

/*
//Interrupt Status Control Register 3 (Read Only)
typedef struct
{
    UINT8    ISCR3;
} CPLD_ISCR3_REGS, *P_CPLD_ISCR3_REGS;
*/
#define nMICROP_INT_STATUS		(1<<7)  //0=inactive, 1=active
#define nTRIGGER_SW1_STATUS		(1<<6)	//0=active, 1=inactive
#define nTRIGGER_SW2_STATUS		(1<<5)	//0=active,	1=inactive
#define nFINGER_INT_STATUS		(1<<4) 	//0=inactive, 1=active
#define nKEYPAD_INT_STATUS		(1<<3)	//0=inactive, 1=active
#define nRFID_INT_STATUS		(1<<2)	//0=inactive, 1=active
#define nDEBUG_LAN_INT_STATUS	(1<<1)	//0=inactive, 1=active
#define nGPS_UART_INT_STATUS	(1<<0)	//0=inactive, 1=active

/*
//Interrupt Pending Control Register 1	(Read/Write)
typedef struct
{
    UINT8    IPCR1;
} CPLD_IPCR1_REGS, *P_CPLD_IPCR1_REGS;
*/
#define nCF_SLOT0_IRQ_PENDING		(1<<7)	//0=normal, 1=active
#define nCF_SLOT0_STSCHG_PENDING	(1<<6)	//0=normal, 1=active
#define nCF_SLOT1_IRQ_PENDING		(1<<5)	//0=normal, 1=active
#define nCF_SLOT1_STSCHG_PENDING	(1<<4)	//0=normal, 1=active
#define nHEADSET_DETECT_PENDING		(1<<3)	//0=normal, 1=active
#define nUSB_DETECT_PENDING			(1<<2)	//0=normal, 1=active
#define nREAD_GOOD_2D_PENDING		(1<<1)	//0=normal, 1=active
#define nDEBUG_IN_PENDING			(1<<0)	//0=normal, 1=active
#define nIPCR1_MASK					(0xFF) 

/*