📄 init_adc12.c
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/**********************************************************************
*
* FileName: init_ADC.c
* Dependencies: p33FJ256GP710.h
* Processor: dsPIC33F
*
* REVISION HISTORY:
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* Author wzl Date 08.07.16
*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
**********************************************************************/
#include "p33FJ256GP710.h"
#include "variable_def.h"
#include "variable_dec.h"
void Init_ADC1( void )
{
/* set port configuration here */
AD1PCFGL = 0xFFFF;
AD1PCFGH = 0xFFFF;
AD1PCFGHbits.PCFG26 = 0; // ensure AN4/RB4 is analog
AD1PCFGHbits.PCFG27 = 0; // ensure AN5/RB5 is analog
AD1PCFGHbits.PCFG28 = 0;
/* set channel scanning here, burst mode sampling and convert*/
AD1CON1bits.FORM = 1; // date output format,signed integer;
AD1CON1bits.SSRC = 2; // sample clock source,GP timer starts conversinon;
AD1CON1bits.ASAM = 1; // ADC sample control,sample begins immediately after conversion;
AD1CON1bits.AD12B = 1; // 12-bit ADC operation;
AD1CON1bits.ADDMABM = 1; // DMA buffers are written in thr order of conversion;
AD1CON2bits.ALTS = 0; // Always uses channel input selects for Sample A
AD1CON2bits.SMPI = 2; // Increments the DMA address or generates interrupt after completion of every 3rd
// sample/conversion operation
AD1CON2bits.CSCNA = 1; // Scan inputs for CH0+ during Sample A bit
AD1CON2bits.VCFG = 0; // internal base
AD1CON3bits.ADCS = 12;
AD1CON3bits.SAMC = 5;
AD1CON3bits.ADRC = 0;
AD1CHS0 = 0x0000;
AD1CSSH = 0x1c00;
AD1CSSL = 0;
IFS0bits.AD1IF = 0; // clear the A/D interrupt flag bit
IEC0bits.AD1IE = 0; // do not enable A/D interrupt
AD1CON1bits.ADON = 1;
}
void Init_ADC2( void )
{
/* set port configuration here */
AD2PCFGL = 0xFFFF;
AD2PCFGLbits.PCFG8 = 0; // ensure AN4/RB4 is analog
AD2PCFGLbits.PCFG9 = 0; // ensure AN5/RB5 is analog
AD2PCFGLbits.PCFG10 = 0;
/* set channel scanning here, burst mode sampling and convert*/
AD2CON1bits.FORM = 1; // date output format,signed integer;
AD2CON1bits.SSRC = 2; // sample clock source,GP timer starts conversinon;
AD2CON1bits.ASAM = 1; // ADC sample control,sample begins immediately after conversion;
AD2CON1bits.AD12B = 1; // 12-bit ADC operation;
AD2CON1bits.ADDMABM = 1; // DMA buffers are written in thr order of conversion;
AD2CON2bits.ALTS = 0; // Always uses channel input selects for Sample A
AD2CON2bits.SMPI = 2; // Increments the DMA address or generates interrupt after completion of every 3rd
// sample/conversion operation
AD2CON2bits.CSCNA = 1; // Scan inputs for CH0+ during Sample A bit
AD2CON2bits.VCFG = 0; // internal base
AD2CON3bits.ADCS = 12;
AD2CON3bits.SAMC = 5;
AD2CON3bits.ADRC = 0;
AD2CHS0 = 0x0000;
AD2CSSL = 0x0E00;
IFS1bits.AD2IF = 0; // clear the A/D interrupt flag bit
IEC1bits.AD2IE = 0; // do not enable A/D interrupt
AD2CON1bits.ADON = 1;
}
void Init_Timer3(void)
{
T3CONbits.TCS = 0;
T3CONbits.TGATE = 1;
TMR3 = 0;
PR3 = 200;
IFS0bits.T3IF = 0;
IEC0bits.T3IE = 0;
T3CONbits.TON = 1;
}
void Init_Timer5(void)
{
T5CONbits.TCS = 0;
T5CONbits.TGATE = 1;
TMR5 = 0;
PR5 = 200;
IFS1bits.T5IF = 0;
IEC1bits.T5IE = 0;
T5CONbits.TON = 1;
}
/*
void Init_DMA0(void)
{
DMA0CON = 0x0000;
DMA0CONbits.AMODE = 2;
DMA0PAD = (int)&ADC1BUF0;
DMA0CNT = ADCNT - 1;
DMA0STA = __builtin_dmaoffset(&ADC1Buffer1[0]);
DMA0CONbits.CHEN = 1;
}
void Init_DMA1(void)
{
DMA1CON = 0x0000;
DMA1CONbits.AMODE = 2;
DMA1PAD = (int)&ADC2BUF0;
DMA1CNT = ADCNT - 1;
DMA1STA = __builtin_dmaoffset(&ADC2Buffer2[0]);
DMA1CONbits.CHEN = 1;
}
*/
//void __attribute__((interrupt__)) _DMA0Interrupt(void)
//{
//}
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