📄 2442lib.txt
字号:
;;;503 //Uart_Printf("Clock division change [hdiv:%x, pdiv:%x]\n", hdivn, pdivn);
;;;504 rCLKDIVN = (hdivn<<1) | pdivn;
|L1.728|
0002d8 e1830082 ORR r0,r3,r2,LSL #1
0002dc e3a0144c MOV r1,#0x4c000000
0002e0 e5810014 STR r0,[r1,#0x14]
;;;505
;;;506 if(hdivn!=0)
0002e4 e3520000 CMP r2,#0
;;;507 MMU_SetAsyncBusMode();
0002e8 1afffffe BNE MMU_SetAsyncBusMode
0002ec e1a0f00e MOV pc,lr ;506
;;;508 /* else
;;;509 MMU_SetFastBusMode();
;;;510 */
;;;511 }
ENDP
ChangeUPllValue PROC
;;;516 void ChangeUPllValue(int mdiv,int pdiv,int sdiv)
;;;517 {
0002f0 e1a00600 MOV r0,r0,LSL #12
;;;518 rUPLLCON = (mdiv<<12) | (pdiv<<4) | sdiv;
0002f4 e1800201 ORR r0,r0,r1,LSL #4
0002f8 e1800002 ORR r0,r0,r2
0002fc e3a0144c MOV r1,#0x4c000000
000300 e5810008 STR r0,[r1,#8]
;;;519 }
000304 e1a0f00e MOV pc,lr
ENDP
Max1718_Set PROC
;;;524 void Max1718_Set(int voltage)
;;;525 {
000308 e1a02000 MOV r2,r0
;;;526
;;;527 int vtg;
;;;528 //////////////////////////////////////////////
;;;529 // D4 D3 D2 D1 D0
;;;530 // 0 1 0 0 0 // 1.35V
;;;531 // 0 1 0 0 1 // 1.30V
;;;532 // 0 1 0 1 0 // 1.25V
;;;533 // 0 1 0 1 1 // 1.20V
;;;534 // 0 1 1 0 0 // 1.15V
;;;535 // 0 1 1 0 1 // 1.10V
;;;536 // 0 1 1 1 0 // 1.05V
;;;537 // 0 1 1 1 1 // 1.00V
;;;538 // 1 0 0 0 1 // 0.95V
;;;539 // 1 0 0 1 1 // 0.90V
;;;540 // 1 0 1 0 1 // 0.85V
;;;541 // 1 0 1 1 1 // 0.80V
;;;542
;;;543 vtg=voltage;
;;;544 switch (vtg)
00030c e352006e CMP r2,#0x6e
000310 e3a00456 MOV r0,#0x56000000 ;543
;;;545 {
;;;546 /*
;;;547 case 135:
;;;548 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
;;;549 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(0<<6)|(0<<5)|(0<<4); //D3~0
;;;550 break;
;;;551
;;;552 case 130:
;;;553 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
;;;554 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(0<<6)|(0<<5)|(1<<4); //D3~0
;;;555 break;
;;;556 */
;;;557 case 125:
;;;558 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
;;;559 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(0<<6)|(1<<5)|(0<<4); //D3~0
;;;560 break;
;;;561
;;;562 case 120:
;;;563 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
;;;564 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(0<<6)|(1<<5)|(1<<4); //D3~0
;;;565 break;
;;;566 /*
;;;567 case 115:
;;;568 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
;;;569 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(1<<6)|(0<<5)|(0<<4); //D3~0
;;;570 break;
;;;571 */
;;;572 case 110:
;;;573 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
000314 05902014 LDREQ r2,[r0,#0x14]
000318 e59f1100 LDR r1,|L1.1056| ;543
00031c 00021001 ANDEQ r1,r2,r1
000320 05801014 STREQ r1,[r0,#0x14]
;;;574 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(1<<6)|(0<<5)|(1<<4); //D3~0
000324 05901054 LDREQ r1,[r0,#0x54]
000328 0201100f ANDEQ r1,r1,#0xf
00032c 038110d0 ORREQ r1,r1,#0xd0
;;;575 break;
000330 0a00000f BEQ |L1.884|
000334 e3520078 CMP r2,#0x78 ;544
000338 0a000007 BEQ |L1.860| ;544
00033c e352007d CMP r2,#0x7d ;544
000340 05902014 LDREQ r2,[r0,#0x14] ;558
000344 00021001 ANDEQ r1,r2,r1 ;558
000348 05801014 STREQ r1,[r0,#0x14] ;558
00034c 05901054 LDREQ r1,[r0,#0x54] ;559
000350 0201100f ANDEQ r1,r1,#0xf ;559
000354 038110a0 ORREQ r1,r1,#0xa0 ;559
000358 0a000005 BEQ |L1.884| ;560
|L1.860|
00035c e5902014 LDR r2,[r0,#0x14] ;563
000360 e0021001 AND r1,r2,r1 ;563
000364 e5801014 STR r1,[r0,#0x14] ;563
000368 e5901054 LDR r1,[r0,#0x54] ;564
00036c e201100f AND r1,r1,#0xf ;564
000370 e38110b0 ORR r1,r1,#0xb0 ;564
;;;576 /*
;;;577 case 105:
;;;578 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
;;;579 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(1<<6)|(1<<5)|(0<<4); //D3~0
;;;580 break;
;;;581
;;;582 case 100:
;;;583 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
;;;584 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(1<<6)|(1<<5)|(1<<4); //D3~0
;;;585 break;
;;;586 */
;;;587 /*
;;;588 case 95:
;;;589 rGPBDAT=(rGPBDAT&0x77f)|(1<<7); //D4
;;;590 rGPFDAT=(rGPFDAT&0x0f)|(0<<7)|(0<<6)|(0<<5)|(1<<4); //D3~0
;;;591 break;
;;;592
;;;593 case 90:
;;;594 rGPBDAT=(rGPBDAT&0x77f)|(1<<7); //D4
;;;595 rGPFDAT=(rGPFDAT&0x0f)|(0<<7)|(0<<6)|(1<<5)|(1<<4); //D3~0
;;;596 break;
;;;597
;;;598 case 85:
;;;599 rGPBDAT=(rGPBDAT&0x77f)|(1<<7); //D4
;;;600 rGPFDAT=(rGPFDAT&0x0f)|(0<<7)|(1<<6)|(0<<5)|(1<<4); //D3~0
;;;601 break;
;;;602
;;;603 case 80:
;;;604 rGPBDAT=(rGPBDAT&0x77f)|(1<<7); //D4
;;;605 rGPFDAT=(rGPFDAT&0x0f)|(0<<7)|(1<<6)|(1<<5)|(1<<4); //D3~0
;;;606 break;
;;;607 */
;;;608 default: // 1.2V
;;;609 rGPBDAT=(rGPBDAT&0x77f)|(0<<7); //D4
;;;610 rGPFDAT=(rGPFDAT&0x0f)|(1<<7)|(0<<6)|(1<<5)|(1<<4); //D3~0
|L1.884|
000374 e5801054 STR r1,[r0,#0x54]
;;;611 break;
;;;612
;;;613
;;;614 }
;;;615
;;;616
;;;617 rGPBCON=(rGPBCON&0x3f3fff)|(1<<14); // GPB7: Output
000378 e5901010 LDR r1,[r0,#0x10]
00037c e59f20a0 LDR r2,|L1.1060|
000380 e0011002 AND r1,r1,r2
000384 e3811c40 ORR r1,r1,#0x4000
000388 e5801010 STR r1,[r0,#0x10]
;;;618
;;;619 rGPFCON=(rGPFCON&0x00ff)|(0x5500); // GPF4~7: Output
00038c e5901050 LDR r1,[r0,#0x50]
000390 e20110ff AND r1,r1,#0xff
000394 e3811c55 ORR r1,r1,#0x5500
000398 e5801050 STR r1,[r0,#0x50]
;;;620
;;;621
;;;622 rGPBDAT&=~(1<<8); //Latch enable
00039c e5901014 LDR r1,[r0,#0x14]
0003a0 e3c11f40 BIC r1,r1,#0x100
0003a4 e5801014 STR r1,[r0,#0x14]
;;;623 rGPBCON=(rGPBCON&0x3cffff)|(1<<16); // GPB8: Output
0003a8 e5901010 LDR r1,[r0,#0x10]
0003ac e3c114ff BIC r1,r1,#0xff000000
0003b0 e3c118c3 BIC r1,r1,#0xc30000
0003b4 e3811b40 ORR r1,r1,#0x10000
0003b8 e5801010 STR r1,[r0,#0x10]
;;;624
;;;625 rGPBDAT|=(1<<10); //Output enable
0003bc e5901014 LDR r1,[r0,#0x14]
0003c0 e3811e40 ORR r1,r1,#0x400
0003c4 e5801014 STR r1,[r0,#0x14]
;;;626 rGPBCON=(rGPBCON&0x0fffff)|(1<<20); // GPB10: Output
0003c8 e5901010 LDR r1,[r0,#0x10]
0003cc e1c11a02 BIC r1,r1,r2,LSL #20
0003d0 e3811940 ORR r1,r1,#0x100000
0003d4 e5801010 STR r1,[r0,#0x10]
;;;627
;;;628 rGPBDAT|=(1<<8); //Latch disable
0003d8 e5901014 LDR r1,[r0,#0x14]
0003dc e3811f40 ORR r1,r1,#0x100
0003e0 e5801014 STR r1,[r0,#0x14]
;;;629
;;;630
;;;631 }
0003e4 e1a0f00e MOV pc,lr
|L1.1000|
0003e8 007fffff DCD 0x007fffff
|L1.1004|
0003ec aaaaaaaa DCD 0xaaaaaaaa
|L1.1008|
0003f0 000055aa DCD 0x000055aa
|L1.1012|
0003f4 ff95ffba DCD 0xff95ffba
|L1.1016|
0003f8 0002faaa DCD 0x0002faaa
|L1.1020|
0003fc 000007ff DCD 0x000007ff
|L1.1024|
000400 0016aaaa DCD 0x0016aaaa
|L1.1028|
000404 00001fff DCD 0x00001fff
|L1.1032|
000408 22222222 DCD 0x22222222
|L1.1036|
00040c 00000245 DCD 0x00000245
|L1.1040|
000410 00000000 DCD ||.data$0||
|L1.1044|
000414 50004000 DCD 0x50004000
|L1.1048|
000418 50008000 DCD 0x50008000
|L1.1052|
00041c 0000ffff DCD 0x0000ffff
|L1.1056|
000420 0000077f DCD 0x0000077f
|L1.1060|
000424 003f3fff DCD 0x003f3fff
ENDP
AREA ||.data||, DATA, ALIGN=2
||.data$0||
whichUart
DCD 0x00000001
AREA |area_number.1|, DATA, ALIGN=2
EXPORTAS |area_number.1|, ||.data||
||.data$5||
mallocPt
DCD ||Image$$RW$$Limit||
END
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -