init.txt

基于ARM7的直流电机的驱动,还有FLASH驱动,LCD驱动等

;
;	AVT RTOS HAL for ARM7(S3C44B0X)
;
;
IRQ_VECTOR	EQU		0x0C080000
INTMSK	    EQU		0x01e0000c
INTCON		EQU		0x1e00000

;预定义常数（常量）
USERMODE    EQU	0x10
FIQMODE	    EQU	0x11
IRQMODE	    EQU	0x12
SVCMODE	    EQU	0x13
ABORTMODE   EQU	0x17
UNDEFMODE   EQU	0x1b
MODEMASK    EQU	0x1f
NOINT	    EQU	0xc0

	IMPORT	bspInit
	IMPORT	avtInit
	IMPORT	|Image$$ZI$$Base|	; uninitialised variables
	IMPORT	|Image$$ZI$$Limit|	; End of variable RAM space

	AREA    Init,CODE,READONLY
	
    ENTRY 
_start
	ldr	    r0,=INTMSK
    ldr	    r1,=0x07ffffff  ;禁止所有中断,初始值是 0x07ffffff
    str	    r1,[r0]
    
    msr	    cpsr_cxsf, #SVCMODE|NOINT 	    	;SVCMode
    ldr	    sp,=init_stk
    
    ;;
    ;;	Zero BSS
    ;;
	LDR		r6, =|Image$$ZI$$Limit|
	MOV		r1, r6
	LDR		r0, =|Image$$ZI$$Base|
	MOV		r3, #0x0
1
	CMP		r0, r1
	STRLO	r3, [r0], #4
	BLO		%B1
	
	MOV		r0, r6
    LDR		r1, =0x0C800000
    B		avtInit
   
;;
;; ffs - find first set bit, this algorithm isolates the first set
;; bit, then multiplies the number by 0x0450fbaf which leaves the top
;; 6 bits as an index into the table.  This algorithm should be a win
;; over the checking each bit in turn as per the C compiled version.
;;
;; under ARMv5 there's an instruction called CLZ (count leading Zero's) that
;; could be used
;;
	EXPORT	ffs
ffs

 ;; Standard trick to isolate bottom bit in r0 or 0 if r0 = 0 on entry
	RSB     r1, r0, #0
	ANDS    r0, r0, r1

;;
;;	now r0 has at most one set bit, call this X
;;	if X = 0, all further instructions are skipped
;;
	ADRNE   r2, ffs_table
	ORRNE   r0, r0, r0, lsl #4  ;; r0 = X * 0x11 
	ORRNE   r0, r0, r0, lsl #6  ;; r0 = X * 0x451
	RSBNE   r0, r0, r0, lsl #16 ;; r0 = X * 0x0450fbaf

;;	now lookup in table indexed on top 6 bits of r0
	LDRNEB  r0, [ r2, r0, lsr #26 ]
	MOV		pc, lr

ffs_table
;;         0   1   2   3   4   5   6   7
	DCB   -1,  0,  1, 12,  2,  6, -1, 13  ;;  0- 7
	DCB    3, -1,  7, -1, -1, -1, -1, 14  ;;  8-15
	DCB   10,  4, -1, -1,  8, -1, -1, 25  ;; 16-23
	DCB   -1, -1, -1, -1, -1, 21, 27, 15  ;; 24-31
	DCB   31, 11,  5, -1, -1, -1, -1, -1  ;; 32-39
	DCB    9, -1, -1, 24, -1, -1, 20, 26  ;; 40-47
	DCB   30, -1, -1, -1, -1, 23, -1, 19  ;; 48-55
	DCB   29, -1, 22, 18, 28, 17, 16, -1  ;; 56-63

;;	CLZNE   r0, r0
;;	RSBNE   r0, r0, #32
;;	MOV		pc, lr

;;
;; system clock interrupt server
;;
;	IMPORT	tm_tick
	IMPORT	tick_wrapper
	IMPORT	InterruptEnter
	EXPORT	TickHandler
TickHandler
	LDR		sp, =intstk
	STMFD	sp!, {r0-r3}
	
	;;
	;; Interrupt Ack
	;;
	MOV		r0, #0x100
	MOV		r1, #0x1e00000
	STR		r0, [r1, #0x24]

	;;
	;; Call avt interrupt handler
	;;
;	LDR		r3, =tm_tick
	LDR		r3, =tick_wrapper
	B		InterruptEnter
	
	
	IMPORT	SL811Isr
	EXPORT	SL811Handler
SL811Handler
	LDR		sp, =intstk
	STMFD	sp!, {r0-r3}
	LDR		r3, =SL811Isr
	B		InterruptEnter

	IMPORT	URX0Isr
	IMPORT	UTX0Isr
	EXPORT	URX0Handler
	EXPORT	UTX0Handler
URX0Handler
	LDR		sp, =intstk
	STMFD	sp!, {r0-r3}
	LDR		r3, =URX0Isr
	B		InterruptEnter

UTX0Handler
	LDR		sp, =intstk
	STMFD	sp!, {r0-r3}
	LDR		r3, =UTX0Isr
	B		InterruptEnter

	IMPORT	DoException
	EXPORT	UndefHandler
	EXPORT	PrefechAbortHandler
	EXPORT	DataAbortHandler
	EXPORT	SwiHandler

UndefHandler
	LDR		sp, =intstk
	STMFD	sp!, {r0-r12, lr}
	
	MRS		r0, cpsr
	MSR		cpsr_c, #0xD3
	MOV		r1, lr
	MRS		r2, spsr
	MSR		cpsr_c, r0
	
	STMFD	sp!, {r1, r2}
	
	MOV		r0, sp
	MOV		r1, #0
	BL		DoException
	LDMFD	sp, {r0-r12, lr}
	SUBS	pc, lr,#4

PrefechAbortHandler
	LDR		sp, =intstk
	STMFD	sp!, {r0-r12, lr}
	
	MRS		r0, cpsr
	MSR		cpsr_c, #0xD3
	SUB		r1, lr, #4
	MRS		r2, spsr
	MSR		cpsr_c, r0
	
	MOV		r0, sp
	MOV		r1, #1
	BL		DoException
	LDMFD	sp, {r0-r12, lr}
	SUBS	pc, lr,#4

DataAbortHandler
	LDR		sp, =intstk
	STMFD	sp!, {r0-r12, lr}
	
	MRS		r0, cpsr
	MSR		cpsr_c, #0xD3
	SUB		r1, lr, #8
	MRS		r2, spsr
	MSR		cpsr_c, r0
	
	STMFD	sp!, {r1, r2}
	
	MOV		r0, sp
	MOV		r1, #2
	BL		DoException
	LDMFD	sp, {r0-r12, lr}
	SUBS	pc, lr,#4

SwiHandler
	LDR		sp, =intstk
	STMFD	sp!, {r0-r12, lr}
	
	MRS		r0, cpsr
	MSR		cpsr_c, #0xD3
	MOV		r1, lr
	MRS		r2, spsr
	MSR		cpsr_c, r0
	
	MOV		r0, sp
	MOV		r1, #3
	BL		DoException
	LDMFD	sp, {r0-r12, lr}
	SUBS	pc, lr,#4

	AREA    AvtData,DATA, READWRITE

	SPACE	4096
intstk
	SPACE	4096
init_stk
    END