📄 op.c.svn-base
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FORCE_RET();}void OPPROTO op_shrl_T1_T0(void){ int shift; shift = T0 & 0xff; if (shift >= 32) T1 = 0; else T1 = (uint32_t)T1 >> shift; FORCE_RET();}void OPPROTO op_sarl_T1_T0(void){ int shift; shift = T0 & 0xff; if (shift >= 32) shift = 31; T1 = (int32_t)T1 >> shift;}void OPPROTO op_rorl_T1_T0(void){ int shift; shift = T0 & 0x1f; if (shift) { T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift)); } FORCE_RET();}/* T1 based, use T0 as shift count and compute CF */void OPPROTO op_shll_T1_T0_cc(void){ int shift; shift = T0 & 0xff; if (shift >= 32) { if (shift == 32) env->CF = T1 & 1; else env->CF = 0; T1 = 0; } else if (shift != 0) { env->CF = (T1 >> (32 - shift)) & 1; T1 = T1 << shift; } FORCE_RET();}void OPPROTO op_shrl_T1_T0_cc(void){ int shift; shift = T0 & 0xff; if (shift >= 32) { if (shift == 32) env->CF = (T1 >> 31) & 1; else env->CF = 0; T1 = 0; } else if (shift != 0) { env->CF = (T1 >> (shift - 1)) & 1; T1 = (uint32_t)T1 >> shift; } FORCE_RET();}void OPPROTO op_sarl_T1_T0_cc(void){ int shift; shift = T0 & 0xff; if (shift >= 32) { env->CF = (T1 >> 31) & 1; T1 = (int32_t)T1 >> 31; } else if (shift != 0) { env->CF = (T1 >> (shift - 1)) & 1; T1 = (int32_t)T1 >> shift; } FORCE_RET();}void OPPROTO op_rorl_T1_T0_cc(void){ int shift1, shift; shift1 = T0 & 0xff; shift = shift1 & 0x1f; if (shift == 0) { if (shift1 != 0) env->CF = (T1 >> 31) & 1; } else { env->CF = (T1 >> (shift - 1)) & 1; T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift)); } FORCE_RET();}/* misc */void OPPROTO op_clz_T0(void){ int count; for (count = 32; T0 > 0; count--) T0 = T0 >> 1; T0 = count; FORCE_RET();}void OPPROTO op_sarl_T0_im(void){ T0 = (int32_t)T0 >> PARAM1;}/* Sign/zero extend */void OPPROTO op_sxth_T0(void){ T0 = (int16_t)T0;}void OPPROTO op_sxth_T1(void){ T1 = (int16_t)T1;}void OPPROTO op_sxtb_T1(void){ T1 = (int8_t)T1;}void OPPROTO op_uxtb_T1(void){ T1 = (uint8_t)T1;}void OPPROTO op_uxth_T1(void){ T1 = (uint16_t)T1;}void OPPROTO op_sxtb16_T1(void){ uint32_t res; res = (uint16_t)(int8_t)T1; res |= (uint32_t)(int8_t)(T1 >> 16) << 16; T1 = res;}void OPPROTO op_uxtb16_T1(void){ uint32_t res; res = (uint16_t)(uint8_t)T1; res |= (uint32_t)(uint8_t)(T1 >> 16) << 16; T1 = res;}#define SIGNBIT (uint32_t)0x80000000/* saturating arithmetic */void OPPROTO op_addl_T0_T1_setq(void){ uint32_t res; res = T0 + T1; if (((res ^ T0) & SIGNBIT) && !((T0 ^ T1) & SIGNBIT)) env->QF = 1; T0 = res; FORCE_RET();}void OPPROTO op_addl_T0_T1_saturate(void){ uint32_t res; res = T0 + T1; if (((res ^ T0) & SIGNBIT) && !((T0 ^ T1) & SIGNBIT)) { env->QF = 1; if (T0 & SIGNBIT) T0 = 0x80000000; else T0 = 0x7fffffff; } else T0 = res; FORCE_RET();}void OPPROTO op_subl_T0_T1_saturate(void){ uint32_t res; res = T0 - T1; if (((res ^ T0) & SIGNBIT) && ((T0 ^ T1) & SIGNBIT)) { env->QF = 1; if (T0 & SIGNBIT) T0 = 0x80000000; else T0 = 0x7fffffff; } else T0 = res; FORCE_RET();}void OPPROTO op_double_T1_saturate(void){ int32_t val; val = T1; if (val >= 0x40000000) { T1 = 0x7fffffff; env->QF = 1; } else if (val <= (int32_t)0xc0000000) { T1 = 0x80000000; env->QF = 1; } else { T1 = val << 1; } FORCE_RET();}/* Unsigned saturating arithmetic for NEON. */void OPPROTO op_addl_T0_T1_usaturate(void){ uint32_t res; res = T0 + T1; if (res < T0) { env->QF = 1; T0 = 0xffffffff; } else { T0 = res; } FORCE_RET();}void OPPROTO op_subl_T0_T1_usaturate(void){ uint32_t res; res = T0 - T1; if (res > T0) { env->QF = 1; T0 = 0; } else { T0 = res; } FORCE_RET();}/* Thumb shift by immediate */void OPPROTO op_shll_T0_im_thumb_cc(void){ int shift; shift = PARAM1; if (shift != 0) { env->CF = (T0 >> (32 - shift)) & 1; T0 = T0 << shift; } env->NZF = T0; FORCE_RET();}void OPPROTO op_shll_T0_im_thumb(void){ T0 = T0 << PARAM1; FORCE_RET();}void OPPROTO op_shrl_T0_im_thumb_cc(void){ int shift; shift = PARAM1; if (shift == 0) { env->CF = ((uint32_t)T0) >> 31; T0 = 0; } else { env->CF = (T0 >> (shift - 1)) & 1; T0 = T0 >> shift; } env->NZF = T0; FORCE_RET();}void OPPROTO op_shrl_T0_im_thumb(void){ int shift; shift = PARAM1; if (shift == 0) { T0 = 0; } else { T0 = T0 >> shift; } FORCE_RET();}void OPPROTO op_sarl_T0_im_thumb_cc(void){ int shift; shift = PARAM1; if (shift == 0) { T0 = ((int32_t)T0) >> 31; env->CF = T0 & 1; } else { env->CF = (T0 >> (shift - 1)) & 1; T0 = ((int32_t)T0) >> shift; } env->NZF = T0; FORCE_RET();}void OPPROTO op_sarl_T0_im_thumb(void){ int shift; shift = PARAM1; if (shift == 0) { env->CF = T0 & 1; } else { T0 = ((int32_t)T0) >> shift; } FORCE_RET();}/* exceptions */void OPPROTO op_swi(void){ env->exception_index = EXCP_SWI; cpu_loop_exit();}void OPPROTO op_undef_insn(void){ env->exception_index = EXCP_UDEF; cpu_loop_exit();}void OPPROTO op_debug(void){ env->exception_index = EXCP_DEBUG; cpu_loop_exit();}void OPPROTO op_wfi(void){ env->exception_index = EXCP_HLT; env->halted = 1; cpu_loop_exit();}void OPPROTO op_bkpt(void){ env->exception_index = EXCP_BKPT; cpu_loop_exit();}void OPPROTO op_exception_exit(void){ env->exception_index = EXCP_EXCEPTION_EXIT; cpu_loop_exit();}/* VFP support. We follow the convention used for VFP instrunctions: Single precition routines have a "s" suffix, double precision a "d" suffix. */#define VFP_OP(name, p) void OPPROTO op_vfp_##name##p(void)#define VFP_BINOP(name) \VFP_OP(name, s) \{ \ FT0s = float32_ ## name (FT0s, FT1s, &env->vfp.fp_status); \} \VFP_OP(name, d) \{ \ FT0d = float64_ ## name (FT0d, FT1d, &env->vfp.fp_status); \}VFP_BINOP(add)VFP_BINOP(sub)VFP_BINOP(mul)VFP_BINOP(div)#undef VFP_BINOP#define VFP_HELPER(name) \VFP_OP(name, s) \{ \ do_vfp_##name##s(); \} \VFP_OP(name, d) \{ \ do_vfp_##name##d(); \}VFP_HELPER(abs)VFP_HELPER(sqrt)VFP_HELPER(cmp)VFP_HELPER(cmpe)#undef VFP_HELPER/* XXX: Will this do the right thing for NANs. Should invert the signbit without looking at the rest of the value. */VFP_OP(neg, s){ FT0s = float32_chs(FT0s);}VFP_OP(neg, d){ FT0d = float64_chs(FT0d);}VFP_OP(F1_ld0, s){ union { uint32_t i; float32 s; } v; v.i = 0; FT1s = v.s;}VFP_OP(F1_ld0, d){ union { uint64_t i; float64 d; } v; v.i = 0; FT1d = v.d;}/* Helper routines to perform bitwise copies between float and int. */static inline float32 vfp_itos(uint32_t i){ union { uint32_t i; float32 s; } v; v.i = i; return v.s;}static inline uint32_t vfp_stoi(float32 s){ union { uint32_t i; float32 s; } v; v.s = s; return v.i;}static inline float64 vfp_itod(uint64_t i){ union { uint64_t i; float64 d; } v; v.i = i; return v.d;}static inline uint64_t vfp_dtoi(float64 d){ union { uint64_t i; float64 d; } v; v.d = d; return v.i;}/* Integer to float conversion. */VFP_OP(uito, s){ FT0s = uint32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status);}VFP_OP(uito, d){ FT0d = uint32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status);}VFP_OP(sito, s){ FT0s = int32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status);}VFP_OP(sito, d){ FT0d = int32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status);}/* Float to integer conversion. */VFP_OP(toui, s){ FT0s = vfp_itos(float32_to_uint32(FT0s, &env->vfp.fp_status));}VFP_OP(toui, d){ FT0s = vfp_itos(float64_to_uint32(FT0d, &env->vfp.fp_status));}VFP_OP(tosi, s){ FT0s = vfp_itos(float32_to_int32(FT0s, &env->vfp.fp_status));}VFP_OP(tosi, d){ FT0s = vfp_itos(float64_to_int32(FT0d, &env->vfp.fp_status));}/* TODO: Set rounding mode properly. */VFP_OP(touiz, s){ FT0s = vfp_itos(float32_to_uint32_round_to_zero(FT0s, &env->vfp.fp_status));}VFP_OP(touiz, d){ FT0s = vfp_itos(float64_to_uint32_round_to_zero(FT0d, &env->vfp.fp_status));}VFP_OP(tosiz, s){ FT0s = vfp_itos(float32_to_int32_round_to_zero(FT0s, &env->vfp.fp_status));}VFP_OP(tosiz, d){ FT0s = vfp_itos(float64_to_int32_round_to_zero(FT0d, &env->vfp.fp_status));}/* floating point conversion */VFP_OP(fcvtd, s){ FT0d = float32_to_float64(FT0s, &env->vfp.fp_status);}VFP_OP(fcvts, d){ FT0s = float64_to_float32(FT0d, &env->vfp.fp_status);}/* VFP3 fixed point conversion. */#define VFP_CONV_FIX(name, p, ftype, itype, sign) \VFP_OP(name##to, p) \{ \ ftype tmp; \ tmp = sign##int32_to_##ftype ((itype)vfp_##p##toi(FT0##p), \ &env->vfp.fp_status); \ FT0##p = ftype##_scalbn(tmp, PARAM1, &env->vfp.fp_status); \} \VFP_OP(to##name, p) \{ \ ftype tmp; \ tmp = ftype##_scalbn(FT0##p, PARAM1, &env->vfp.fp_status); \ FT0##p = vfp_ito##p((itype)ftype##_to_##sign##int32_round_to_zero(tmp, \ &env->vfp.fp_status)); \}VFP_CONV_FIX(sh, d, float64, int16, )VFP_CONV_FIX(sl, d, float64, int32, )VFP_CONV_FIX(uh, d, float64, uint16, u)VFP_CONV_FIX(ul, d, float64, uint32, u)VFP_CONV_FIX(sh, s, float32, int16, )VFP_CONV_FIX(sl, s, float32, int32, )VFP_CONV_FIX(uh, s, float32, uint16, u)VFP_CONV_FIX(ul, s, float32, uint32, u)/* Get and Put values from registers. */VFP_OP(getreg_F0, d){ FT0d = *(float64 *)((char *) env + PARAM1);}VFP_OP(getreg_F0, s){ FT0s = *(float32 *)((char *) env + PARAM1);}VFP_OP(getreg_F1, d){ FT1d = *(float64 *)((char *) env + PARAM1);}VFP_OP(getreg_F1, s){ FT1s = *(float32 *)((char *) env + PARAM1);}VFP_OP(setreg_F0, d){ *(float64 *)((char *) env + PARAM1) = FT0d;}VFP_OP(setreg_F0, s){ *(float32 *)((char *) env + PARAM1) = FT0s;}void OPPROTO op_vfp_movl_T0_fpscr(void){ do_vfp_get_fpscr ();}void OPPROTO op_vfp_movl_T0_fpscr_flags(void){ T0 = env->vfp.xregs[ARM_VFP_FPSCR] & (0xf << 28);}void OPPROTO op_vfp_movl_fpscr_T0(void){ do_vfp_set_fpscr();}void OPPROTO op_vfp_movl_T0_xreg(void){ T0 = env->vfp.xregs[PARAM1];}void OPPROTO op_vfp_movl_xreg_T0(void){ env->vfp.xregs[PARAM1] = T0;}/* Move between FT0s to T0 */void OPPROTO op_vfp_mrs(void){ T0 = vfp_stoi(FT0s);
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