📄 translate.c.svn-base
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modename[i++] = 'w'; if (mode & 2) modename[i++] = 'b'; if (mode & 1) modename[i++] = 'r'; modename[i++] = 0; return modename;}#endifstatic unsigned int dec_swap_r(DisasContext *dc){ DIS(char modename[4]); DIS(fprintf (logfile, "swap%s $r%u\n", swapmode_name(dc->op2, modename), dc->op1)); cris_cc_mask(dc, CC_MASK_NZ); gen_movl_T0_reg[dc->op1](); if (dc->op2 & 8) gen_op_not_T0_T0(); if (dc->op2 & 4) gen_op_swapw_T0_T0(); if (dc->op2 & 2) gen_op_swapb_T0_T0(); if (dc->op2 & 1) gen_op_swapr_T0_T0(); gen_op_movl_T1_T0(); crisv32_alu_op(dc, CC_OP_MOVE, dc->op1, 4); return 2;}static unsigned int dec_or_r(DisasContext *dc){ int size = memsize_zz(dc); DIS(fprintf (logfile, "or.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0); crisv32_alu_op(dc, CC_OP_OR, dc->op2, size); return 2;}static unsigned int dec_addi_r(DisasContext *dc){ DIS(fprintf (logfile, "addi.%c $r%u, $r%u\n", memsize_char(memsize_zz(dc)), dc->op2, dc->op1)); cris_cc_mask(dc, 0); dec_prep_alu_r(dc, dc->op1, dc->op2, 4, 0); gen_op_lsll_T0_im(dc->zzsize); gen_op_addl_T0_T1(); gen_movl_reg_T0[dc->op1](); return 2;}static unsigned int dec_addi_acr(DisasContext *dc){ DIS(fprintf (logfile, "addi.%c $r%u, $r%u, $acr\n", memsize_char(memsize_zz(dc)), dc->op2, dc->op1)); cris_cc_mask(dc, 0); dec_prep_alu_r(dc, dc->op1, dc->op2, 4, 0); gen_op_lsll_T0_im(dc->zzsize); gen_op_addl_T0_T1(); gen_movl_reg_T0[REG_ACR](); return 2;}static unsigned int dec_neg_r(DisasContext *dc){ int size = memsize_zz(dc); DIS(fprintf (logfile, "neg.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0); crisv32_alu_op(dc, CC_OP_NEG, dc->op2, size); return 2;}static unsigned int dec_btst_r(DisasContext *dc){ DIS(fprintf (logfile, "btst $r%u, $r%u\n", dc->op1, dc->op2)); cris_evaluate_flags(dc); cris_cc_mask(dc, CC_MASK_NZ); dec_prep_alu_r(dc, dc->op1, dc->op2, 4, 0); crisv32_alu_op(dc, CC_OP_BTST, dc->op2, 4); cris_update_cc_op(dc, CC_OP_FLAGS); gen_op_movl_flags_T0(); dc->flags_live = 1; return 2;}static unsigned int dec_sub_r(DisasContext *dc){ int size = memsize_zz(dc); DIS(fprintf (logfile, "sub.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); dec_prep_alu_r(dc, dc->op1, dc->op2, size, 0); crisv32_alu_op(dc, CC_OP_SUB, dc->op2, size); return 2;}/* Zero extension. From size to dword. */static unsigned int dec_movu_r(DisasContext *dc){ int size = memsize_z(dc); DIS(fprintf (logfile, "movu.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); dec_prep_move_r(dc, dc->op1, dc->op2, size, 0); crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4); return 2;}/* Sign extension. From size to dword. */static unsigned int dec_movs_r(DisasContext *dc){ int size = memsize_z(dc); DIS(fprintf (logfile, "movs.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); gen_movl_T0_reg[dc->op1](); /* Size can only be qi or hi. */ gen_sext_T1_T0(size); crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4); return 2;}/* zero extension. From size to dword. */static unsigned int dec_addu_r(DisasContext *dc){ int size = memsize_z(dc); DIS(fprintf (logfile, "addu.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); gen_movl_T0_reg[dc->op1](); /* Size can only be qi or hi. */ gen_zext_T1_T0(size); gen_movl_T0_reg[dc->op2](); crisv32_alu_op(dc, CC_OP_ADD, dc->op2, 4); return 2;}/* Sign extension. From size to dword. */static unsigned int dec_adds_r(DisasContext *dc){ int size = memsize_z(dc); DIS(fprintf (logfile, "adds.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); gen_movl_T0_reg[dc->op1](); /* Size can only be qi or hi. */ gen_sext_T1_T0(size); gen_movl_T0_reg[dc->op2](); crisv32_alu_op(dc, CC_OP_ADD, dc->op2, 4); return 2;}/* Zero extension. From size to dword. */static unsigned int dec_subu_r(DisasContext *dc){ int size = memsize_z(dc); DIS(fprintf (logfile, "subu.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); gen_movl_T0_reg[dc->op1](); /* Size can only be qi or hi. */ gen_zext_T1_T0(size); gen_movl_T0_reg[dc->op2](); crisv32_alu_op(dc, CC_OP_SUB, dc->op2, 4); return 2;}/* Sign extension. From size to dword. */static unsigned int dec_subs_r(DisasContext *dc){ int size = memsize_z(dc); DIS(fprintf (logfile, "subs.%c $r%u, $r%u\n", memsize_char(size), dc->op1, dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); gen_movl_T0_reg[dc->op1](); /* Size can only be qi or hi. */ gen_sext_T1_T0(size); gen_movl_T0_reg[dc->op2](); crisv32_alu_op(dc, CC_OP_SUB, dc->op2, 4); return 2;}static unsigned int dec_setclrf(DisasContext *dc){ uint32_t flags; int set = (~dc->opcode >> 2) & 1; flags = (EXTRACT_FIELD(dc->ir, 12, 15) << 4) | EXTRACT_FIELD(dc->ir, 0, 3); DIS(fprintf (logfile, "set=%d flags=%x\n", set, flags)); if (set && flags == 0) DIS(fprintf (logfile, "nop\n")); else if (!set && (flags & 0x20)) DIS(fprintf (logfile, "di\n")); else DIS(fprintf (logfile, "%sf %x\n", set ? "set" : "clr", flags)); if (set && (flags & X_FLAG)) { dc->flagx_live = 1; dc->flags_x = 1; } /* Simply decode the flags. */ cris_evaluate_flags (dc); cris_update_cc_op(dc, CC_OP_FLAGS); if (set) gen_op_setf (flags); else gen_op_clrf (flags); dc->flags_live = 1; return 2;}static unsigned int dec_move_rs(DisasContext *dc){ DIS(fprintf (logfile, "move $r%u, $s%u\n", dc->op1, dc->op2)); cris_cc_mask(dc, 0); gen_movl_T0_reg[dc->op1](); gen_op_movl_sreg_T0(dc->op2); if (dc->op2 == 5) /* srs is checked at runtime. */ gen_op_movl_tlb_lo_T0(); return 2;}static unsigned int dec_move_sr(DisasContext *dc){ DIS(fprintf (logfile, "move $s%u, $r%u\n", dc->op1, dc->op2)); cris_cc_mask(dc, 0); gen_op_movl_T0_sreg(dc->op1); gen_op_movl_T1_T0(); crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4); return 2;}static unsigned int dec_move_rp(DisasContext *dc){ DIS(fprintf (logfile, "move $r%u, $p%u\n", dc->op1, dc->op2)); cris_cc_mask(dc, 0); gen_movl_T0_reg[dc->op1](); gen_op_movl_T1_T0(); gen_movl_preg_T0[dc->op2](); return 2;}static unsigned int dec_move_pr(DisasContext *dc){ DIS(fprintf (logfile, "move $p%u, $r%u\n", dc->op1, dc->op2)); cris_cc_mask(dc, 0); gen_movl_T0_preg[dc->op2](); gen_op_movl_T1_T0(); crisv32_alu_op(dc, CC_OP_MOVE, dc->op1, preg_sizes[dc->op2]); return 2;}static unsigned int dec_move_mr(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "move.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, memsize); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_movs_m(DisasContext *dc){ int memsize = memsize_z(dc); int insn_len; DIS(fprintf (logfile, "movs.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); /* sign extend. */ cris_cc_mask(dc, CC_MASK_NZ); insn_len = dec_prep_alu_m(dc, 1, memsize); crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_addu_m(DisasContext *dc){ int memsize = memsize_z(dc); int insn_len; DIS(fprintf (logfile, "addu.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); /* sign extend. */ cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_ADD, dc->op2, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_adds_m(DisasContext *dc){ int memsize = memsize_z(dc); int insn_len; DIS(fprintf (logfile, "adds.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); /* sign extend. */ cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 1, memsize); crisv32_alu_op(dc, CC_OP_ADD, dc->op2, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_subu_m(DisasContext *dc){ int memsize = memsize_z(dc); int insn_len; DIS(fprintf (logfile, "subu.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); /* sign extend. */ cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_SUB, dc->op2, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_subs_m(DisasContext *dc){ int memsize = memsize_z(dc); int insn_len; DIS(fprintf (logfile, "subs.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); /* sign extend. */ cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 1, memsize); crisv32_alu_op(dc, CC_OP_SUB, dc->op2, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_movu_m(DisasContext *dc){ int memsize = memsize_z(dc); int insn_len; DIS(fprintf (logfile, "movu.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_cmpu_m(DisasContext *dc){ int memsize = memsize_z(dc); int insn_len; DIS(fprintf (logfile, "cmpu.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_CMP, dc->op2, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_cmps_m(DisasContext *dc){ int memsize = memsize_z(dc); int insn_len; DIS(fprintf (logfile, "cmps.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 1, memsize); crisv32_alu_op(dc, CC_OP_CMP, dc->op2, memsize_zz(dc)); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_cmp_m(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "cmp.%c [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_CMP, dc->op2, memsize_zz(dc)); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_test_m(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "test.%d [$r%u%s] op2=%x\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); gen_op_clrf(3); insn_len = dec_prep_alu_m(dc, 0, memsize); gen_op_swp_T0_T1(); gen_op_movl_T1_im(0); crisv32_alu_op(dc, CC_OP_CMP, dc->op2, memsize_zz(dc)); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_and_m(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "and.%d [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_AND, dc->op2, memsize_zz(dc)); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_add_m(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "add.%d [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_ADD, dc->op2, memsize_zz(dc)); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_addo_m(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "add.%d [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, 0); insn_len = dec_prep_alu_m(dc, 1, memsize); crisv32_alu_op(dc, CC_OP_ADD, REG_ACR, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_bound_m(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "bound.%d [$r%u%s, $r%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, CC_MASK_NZ); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_BOUND, dc->op2, 4); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_addc_mr(DisasContext *dc){ int insn_len = 2; DIS(fprintf (logfile, "addc [$r%u%s, $r%u\n", dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_evaluate_flags(dc); cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 0, 4); crisv32_alu_op(dc, CC_OP_ADDC, dc->op2, 4); do_postinc(dc, 4); return insn_len;}static unsigned int dec_sub_m(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "sub.%c [$r%u%s, $r%u ir=%x zz=%x\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2, dc->ir, dc->zzsize)); cris_cc_mask(dc, CC_MASK_NZVC); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_SUB, dc->op2, memsize); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_or_m(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len; DIS(fprintf (logfile, "or.%d [$r%u%s, $r%u pc=%x\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2, dc->pc)); cris_cc_mask(dc, CC_MASK_NZ); insn_len = dec_prep_alu_m(dc, 0, memsize); crisv32_alu_op(dc, CC_OP_OR, dc->op2, memsize_zz(dc)); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_move_mp(DisasContext *dc){ int memsize = memsize_zz(dc); int insn_len = 2; DIS(fprintf (logfile, "move.%c [$r%u%s, $p%u\n", memsize_char(memsize), dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, 0); insn_len = dec_prep_alu_m(dc, 0, memsize); gen_op_movl_T0_T1(); gen_movl_preg_T0[dc->op2](); do_postinc(dc, memsize); return insn_len;}static unsigned int dec_move_pm(DisasContext *dc){ int memsize; memsize = preg_sizes[dc->op2]; DIS(fprintf (logfile, "move.%d $p%u, [$r%u%s\n", memsize, dc->op2, dc->op1, dc->postinc ? "+]" : "]")); cris_cc_mask(dc, 0); /* prepare store. */ gen_movl_T0_preg[dc->op2](); gen_op_movl_T1_T0(); gen_movl_T0_reg[dc->op1](); gen_store_T0_T1(dc, memsize); if (dc->postinc) { gen_op_addl_T0_im(memsize); gen_movl_reg_T0[dc->op1](); } return 2;}static unsigned int dec_movem_mr(DisasContext *dc){ int i; DIS(fprintf (logfile, "movem [$r%u%s, $r%u\n", dc->op1, dc->postinc ? "+]" : "]", dc->op2)); cris_cc_mask(dc, 0); /* fetch the address into T1. */ gen_movl_T0_reg[dc->op1](); gen_op_movl_T1_T0(); for (i = 0; i <= dc->op2; i++) { /* Perform the load onto regnum i. Always dword wide. */ gen_load_T0_T0(dc, 4, 0); gen_movl_reg_T0[i](); /* Update the address. */
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