📄 helper2.c.svn-base
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/* * i386 helpers (without register variable usage) * * Copyright (c) 2003 Fabrice Bellard * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2 of the License, or (at your option) any later version. * * This library is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */#include <stdarg.h>#include <stdlib.h>#include <stdio.h>#include <string.h>#include <inttypes.h>#include <signal.h>#include <assert.h>#include "cpu.h"#include "exec-all.h"#include "svm.h"//#define DEBUG_MMUstatic int cpu_x86_register (CPUX86State *env, const char *cpu_model);static void add_flagname_to_bitmaps(char *flagname, uint32_t *features, uint32_t *ext_features, uint32_t *ext2_features, uint32_t *ext3_features){ int i; /* feature flags taken from "Intel Processor Identification and the CPUID * Instruction" and AMD's "CPUID Specification". In cases of disagreement * about feature names, the Linux name is used. */ const char *feature_name[] = { "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx", "fxsr", "sse", "sse2", "ss", "ht" /* Intel htt */, "tm", "ia64", "pbe", }; const char *ext_feature_name[] = { "pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est", "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL, NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }; const char *ext2_feature_name[] = { "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mttr", "pge", "mca", "cmov", "pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx", "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow", }; const char *ext3_feature_name[] = { "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse", "3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, "skinit", "wdt", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, }; for ( i = 0 ; i < 32 ; i++ ) if (feature_name[i] && !strcmp (flagname, feature_name[i])) { *features |= 1 << i; return; } for ( i = 0 ; i < 32 ; i++ ) if (ext_feature_name[i] && !strcmp (flagname, ext_feature_name[i])) { *ext_features |= 1 << i; return; } for ( i = 0 ; i < 32 ; i++ ) if (ext2_feature_name[i] && !strcmp (flagname, ext2_feature_name[i])) { *ext2_features |= 1 << i; return; } for ( i = 0 ; i < 32 ; i++ ) if (ext3_feature_name[i] && !strcmp (flagname, ext3_feature_name[i])) { *ext3_features |= 1 << i; return; } fprintf(stderr, "CPU feature %s not found\n", flagname);}CPUX86State *cpu_x86_init(const char *cpu_model){ CPUX86State *env; static int inited; env = qemu_mallocz(sizeof(CPUX86State)); if (!env) return NULL; cpu_exec_init(env); env->cpu_model_str = cpu_model; /* init various static tables */ if (!inited) { inited = 1; optimize_flags_init(); } if (cpu_x86_register(env, cpu_model) < 0) { cpu_x86_close(env); return NULL; } cpu_reset(env);#ifdef USE_KQEMU kqemu_init(env);#endif return env;}typedef struct x86_def_t { const char *name; uint32_t level; uint32_t vendor1, vendor2, vendor3; int family; int model; int stepping; uint32_t features, ext_features, ext2_features, ext3_features; uint32_t xlevel;} x86_def_t;#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \ CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \ CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \ CPUID_PAE | CPUID_SEP | CPUID_APIC)static x86_def_t x86_defs[] = {#ifdef TARGET_X86_64 { .name = "qemu64", .level = 2, .vendor1 = 0x68747541, /* "Auth" */ .vendor2 = 0x69746e65, /* "enti" */ .vendor3 = 0x444d4163, /* "cAMD" */ .family = 6, .model = 2, .stepping = 3, .features = PPRO_FEATURES | /* these features are needed for Win64 and aren't fully implemented */ CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | /* this feature is needed for Solaris and isn't fully implemented */ CPUID_PSE36, .ext_features = CPUID_EXT_SSE3, .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, .ext3_features = CPUID_EXT3_SVM, .xlevel = 0x8000000A, },#endif { .name = "qemu32", .level = 2, .family = 6, .model = 3, .stepping = 3, .features = PPRO_FEATURES, .ext_features = CPUID_EXT_SSE3, .xlevel = 0, }, { .name = "486", .level = 0, .family = 4, .model = 0, .stepping = 0, .features = 0x0000000B, .xlevel = 0, }, { .name = "pentium", .level = 1, .family = 5, .model = 4, .stepping = 3, .features = 0x008001BF, .xlevel = 0, }, { .name = "pentium2", .level = 2, .family = 6, .model = 5, .stepping = 2, .features = 0x0183F9FF, .xlevel = 0, }, { .name = "pentium3", .level = 2, .family = 6, .model = 7, .stepping = 3, .features = 0x0383F9FF, .xlevel = 0, },};static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model){ unsigned int i; x86_def_t *def; char *s = strdup(cpu_model); char *featurestr, *name = strtok(s, ","); uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0; uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0; int family = -1, model = -1, stepping = -1; def = NULL; for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++) { if (strcmp(name, x86_defs[i].name) == 0) { def = &x86_defs[i]; break; } } if (!def) goto error; memcpy(x86_cpu_def, def, sizeof(*def)); featurestr = strtok(NULL, ","); while (featurestr) { char *val; if (featurestr[0] == '+') { add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features); } else if (featurestr[0] == '-') { add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features); } else if ((val = strchr(featurestr, '='))) { *val = 0; val++; if (!strcmp(featurestr, "family")) { char *err; family = strtol(val, &err, 10); if (!*val || *err || family < 0) { fprintf(stderr, "bad numerical value %s\n", val); x86_cpu_def = 0; goto error; } x86_cpu_def->family = family; } else if (!strcmp(featurestr, "model")) { char *err; model = strtol(val, &err, 10); if (!*val || *err || model < 0 || model > 0xf) { fprintf(stderr, "bad numerical value %s\n", val); x86_cpu_def = 0; goto error; } x86_cpu_def->model = model; } else if (!strcmp(featurestr, "stepping")) { char *err; stepping = strtol(val, &err, 10); if (!*val || *err || stepping < 0 || stepping > 0xf) { fprintf(stderr, "bad numerical value %s\n", val); x86_cpu_def = 0; goto error; } x86_cpu_def->stepping = stepping; } else { fprintf(stderr, "unrecognized feature %s\n", featurestr); x86_cpu_def = 0; goto error; } } else { fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr); x86_cpu_def = 0; goto error; } featurestr = strtok(NULL, ","); } x86_cpu_def->features |= plus_features; x86_cpu_def->ext_features |= plus_ext_features; x86_cpu_def->ext2_features |= plus_ext2_features; x86_cpu_def->ext3_features |= plus_ext3_features; x86_cpu_def->features &= ~minus_features; x86_cpu_def->ext_features &= ~minus_ext_features; x86_cpu_def->ext2_features &= ~minus_ext2_features; x86_cpu_def->ext3_features &= ~minus_ext3_features; free(s); return 0;error: free(s); return -1;}void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)){ unsigned int i; for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++) (*cpu_fprintf)(f, "x86 %16s\n", x86_defs[i].name);}static int cpu_x86_register (CPUX86State *env, const char *cpu_model){ x86_def_t def1, *def = &def1; if (cpu_x86_find_by_name(def, cpu_model) < 0) return -1; if (def->vendor1) { env->cpuid_vendor1 = def->vendor1; env->cpuid_vendor2 = def->vendor2; env->cpuid_vendor3 = def->vendor3; } else { env->cpuid_vendor1 = 0x756e6547; /* "Genu" */ env->cpuid_vendor2 = 0x49656e69; /* "ineI" */ env->cpuid_vendor3 = 0x6c65746e; /* "ntel" */ } env->cpuid_level = def->level; env->cpuid_version = (def->family << 8) | (def->model << 4) | def->stepping; env->cpuid_features = def->features; env->pat = 0x0007040600070406ULL; env->cpuid_ext_features = def->ext_features; env->cpuid_ext2_features = def->ext2_features; env->cpuid_xlevel = def->xlevel; env->cpuid_ext3_features = def->ext3_features; { const char *model_id = "QEMU Virtual CPU version " QEMU_VERSION; int c, len, i; len = strlen(model_id); for(i = 0; i < 48; i++) { if (i >= len) c = '\0'; else c = model_id[i]; env->cpuid_model[i >> 2] |= c << (8 * (i & 3)); } } return 0;}/* NOTE: must be called outside the CPU execute loop */void cpu_reset(CPUX86State *env){ int i; memset(env, 0, offsetof(CPUX86State, breakpoints)); tlb_flush(env, 1); env->old_exception = -1; /* init to reset state */#ifdef CONFIG_SOFTMMU env->hflags |= HF_SOFTMMU_MASK;#endif env->hflags |= HF_GIF_MASK; cpu_x86_update_cr0(env, 0x60000010); env->a20_mask = 0xffffffff; env->smbase = 0x30000; env->idt.limit = 0xffff; env->gdt.limit = 0xffff; env->ldt.limit = 0xffff; env->ldt.flags = DESC_P_MASK; env->tr.limit = 0xffff; env->tr.flags = DESC_P_MASK; cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, 0); cpu_x86_load_seg_cache(env, R_DS, 0, 0, 0xffff, 0); cpu_x86_load_seg_cache(env, R_ES, 0, 0, 0xffff, 0); cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff, 0); cpu_x86_load_seg_cache(env, R_FS, 0, 0, 0xffff, 0); cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, 0); env->eip = 0xfff0; env->regs[R_EDX] = env->cpuid_version; env->eflags = 0x2; /* FPU init */ for(i = 0;i < 8; i++) env->fptags[i] = 1; env->fpuc = 0x37f; env->mxcsr = 0x1f80;}void cpu_x86_close(CPUX86State *env){ free(env);
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