translate_init.c.svn-base

我们自己开发的一个OSEK操作系统！不知道可不可以？

/*
 *  PowerPC CPU initialization for qemu.
 *
 *  Copyright (c) 2003-2007 Jocelyn Mayer
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

/* A lot of PowerPC definition have been included here.
 * Most of them are not usable for now but have been kept
 * inside "#if defined(TODO) ... #endif" statements to make tests easier.
 */

#include "dis-asm.h"
#include "host-utils.h"
#include "cpu.h"


//#define PPC_DUMP_CPU
//#define PPC_DEBUG_SPR
//#define PPC_DUMP_SPR_ACCESSES
#if defined(CONFIG_USER_ONLY)
#define TODO_USER_ONLY 1
#endif

struct ppc_def_t {
    const unsigned char *name;
    uint32_t pvr;
    uint32_t svr;
    uint64_t insns_flags;
    uint64_t msr_mask;
    powerpc_mmu_t   mmu_model;
    powerpc_excp_t  excp_model;
    powerpc_input_t bus_model;
    uint32_t flags;
    int bfd_mach;
    void (*init_proc)(CPUPPCState *env);
    int  (*check_pow)(CPUPPCState *env);
};

/* For user-mode emulation, we don't emulate any IRQ controller */
#if defined(CONFIG_USER_ONLY)
#define PPC_IRQ_INIT_FN(name)                                                 \
static inline void glue(glue(ppc, name),_irq_init) (CPUPPCState *env)         \
{                                                                             \
}
#else
#define PPC_IRQ_INIT_FN(name)                                                 \
void glue(glue(ppc, name),_irq_init) (CPUPPCState *env);
#endif

PPC_IRQ_INIT_FN(40x);
PPC_IRQ_INIT_FN(6xx);
PPC_IRQ_INIT_FN(970);

/* Generic callbacks:
 * do nothing but store/retrieve spr value
 */
#ifdef PPC_DUMP_SPR_ACCESSES
static void spr_read_generic (void *opaque, int sprn)
{
    gen_op_load_dump_spr(sprn);
}

static void spr_write_generic (void *opaque, int sprn)
{
    gen_op_store_dump_spr(sprn);
}
#else
static void spr_mpc_write(void *opaque, int sprn)//debugger
{    
    
	 CPUState  *env=(CPUState *)opaque;    
	  
	  
    switch(sprn)
    	{
         case 0x050:	
		 	 env->msr=env->msr|0x20080000;
		 	 printf("msr is:%x\n",env->msr);			 
			 break;
		 case 0x051:
		 	 env->msr=env->msr|0x20000000;
			 env->msr=env->msr&(~0x00080000);
		 	 printf("msr is:%x\n",env->msr);
			 break;
		 case 0x052:
		 	env->msr=env->msr&(~0x2008000);
		 	printf("msr is:%x\n", env->msr);
			break;
		 default:
		 	break;
	     }
}

static void spr_mpc_read(void *opaque, int sprn)//debugger
{  
    
  	 CPUState  *env=(CPUState *)opaque;    
	  
	  
    switch(sprn)
    	{
         case 0x050:	
		 	 env->msr=env->msr|0x20080000;
		 	 printf("msr is:%x\n",env->msr);			 
			 break;
		 case 0x051:
		 	 env->msr=env->msr|0x20000000;
			 env->msr=env->msr&(~0x00080000);
		 	 printf("msr is:%x\n",env->msr);
			 break;
		 case 0x052:
		 	env->msr=env->msr&(~0x2008000);
		 	printf("msr is:%x\n", env->msr);
			break;
		 default:
		 	break;
	     }
}


static void spr_read_generic (void *opaque, int sprn)
{
    gen_op_load_spr(sprn);
}

static void spr_write_generic (void *opaque, int sprn)
{
    gen_op_store_spr(sprn);
}
#endif

#if !defined(CONFIG_USER_ONLY)
static void spr_write_clear (void *opaque, int sprn)
{
    gen_op_mask_spr(sprn);
}
#endif

/* SPR common to all PowerPC */
/* XER */
static void spr_read_xer (void *opaque, int sprn)
{
    gen_op_load_xer();
}

static void spr_write_xer (void *opaque, int sprn)
{
    gen_op_store_xer();
}

/* LR */
static void spr_read_lr (void *opaque, int sprn)
{
    gen_op_load_lr();
}

static void spr_write_lr (void *opaque, int sprn)
{
    gen_op_store_lr();
}

/* CTR */
static void spr_read_ctr (void *opaque, int sprn)
{
    gen_op_load_ctr();
}

static void spr_write_ctr (void *opaque, int sprn)
{
    gen_op_store_ctr();
}

/* User read access to SPR */
/* USPRx */
/* UMMCRx */
/* UPMCx */
/* USIA */
/* UDECR */
static void spr_read_ureg (void *opaque, int sprn)
{
    gen_op_load_spr(sprn + 0x10);
}

/* SPR common to all non-embedded PowerPC */
/* DECR */
#if !defined(CONFIG_USER_ONLY)
static void spr_read_decr (void *opaque, int sprn)
{    
        gen_op_load_decr();
}

static void spr_write_decr (void *opaque, int sprn)
{
    printf("\n write dec\n");//debugger
    gen_op_store_decr();
}
#endif

/* SPR common to all non-embedded PowerPC, except 601 */
/* Time base */
static void spr_read_tbl (void *opaque, int sprn)
{
    gen_op_load_tbl();
}

static void spr_read_tbu (void *opaque, int sprn)
{
    gen_op_load_tbu();
}

__attribute__ (( unused ))
static void spr_read_atbl (void *opaque, int sprn)
{
    gen_op_load_atbl();
}

__attribute__ (( unused ))
static void spr_read_atbu (void *opaque, int sprn)
{
    gen_op_load_atbu();
}

#if !defined(CONFIG_USER_ONLY)
static void spr_write_tbl (void *opaque, int sprn)
{
    gen_op_store_tbl();
}

static void spr_write_tbu (void *opaque, int sprn)
{
    gen_op_store_tbu();
}

__attribute__ (( unused ))
static void spr_write_atbl (void *opaque, int sprn)
{
    gen_op_store_atbl();
}

__attribute__ (( unused ))
static void spr_write_atbu (void *opaque, int sprn)
{
    gen_op_store_atbu();
}
#endif

#if !defined(CONFIG_USER_ONLY)
/* IBAT0U...IBAT0U */
/* IBAT0L...IBAT7L */
static void spr_read_ibat (void *opaque, int sprn)
{
    gen_op_load_ibat(sprn & 1, (sprn - SPR_IBAT0U) / 2);
}

static void spr_read_ibat_h (void *opaque, int sprn)
{
    gen_op_load_ibat(sprn & 1, (sprn - SPR_IBAT4U) / 2);
}

static void spr_write_ibatu (void *opaque, int sprn)
{
    gen_op_store_ibatu((sprn - SPR_IBAT0U) / 2);
}

static void spr_write_ibatu_h (void *opaque, int sprn)
{
    gen_op_store_ibatu((sprn - SPR_IBAT4U) / 2);
}

static void spr_write_ibatl (void *opaque, int sprn)
{
    gen_op_store_ibatl((sprn - SPR_IBAT0L) / 2);
}

static void spr_write_ibatl_h (void *opaque, int sprn)
{
    gen_op_store_ibatl((sprn - SPR_IBAT4L) / 2);
}

/* DBAT0U...DBAT7U */
/* DBAT0L...DBAT7L */
static void spr_read_dbat (void *opaque, int sprn)
{
    gen_op_load_dbat(sprn & 1, (sprn - SPR_DBAT0U) / 2);
}

static void spr_read_dbat_h (void *opaque, int sprn)
{
    gen_op_load_dbat(sprn & 1, ((sprn - SPR_DBAT4U) / 2) + 4);
}

static void spr_write_dbatu (void *opaque, int sprn)
{
    gen_op_store_dbatu((sprn - SPR_DBAT0U) / 2);
}

static void spr_write_dbatu_h (void *opaque, int sprn)
{
    gen_op_store_dbatu(((sprn - SPR_DBAT4U) / 2) + 4);
}

static void spr_write_dbatl (void *opaque, int sprn)
{
    gen_op_store_dbatl((sprn - SPR_DBAT0L) / 2);
}

static void spr_write_dbatl_h (void *opaque, int sprn)
{
    gen_op_store_dbatl(((sprn - SPR_DBAT4L) / 2) + 4);
}

/* SDR1 */
static void spr_read_sdr1 (void *opaque, int sprn)
{
    gen_op_load_sdr1();
}

static void spr_write_sdr1 (void *opaque, int sprn)
{
    gen_op_store_sdr1();
}

/* 64 bits PowerPC specific SPRs */
/* ASR */
#if defined(TARGET_PPC64)
static void spr_read_asr (void *opaque, int sprn)
{
    gen_op_load_asr();
}

static void spr_write_asr (void *opaque, int sprn)
{
    gen_op_store_asr();
}
#endif
#endif

/* PowerPC 601 specific registers */
/* RTC */
static void spr_read_601_rtcl (void *opaque, int sprn)
{
    gen_op_load_601_rtcl();
}

static void spr_read_601_rtcu (void *opaque, int sprn)
{
    gen_op_load_601_rtcu();
}

#if !defined(CONFIG_USER_ONLY)
static void spr_write_601_rtcu (void *opaque, int sprn)
{
    gen_op_store_601_rtcu();
}

static void spr_write_601_rtcl (void *opaque, int sprn)
{
    gen_op_store_601_rtcl();
}

static void spr_write_hid0_601 (void *opaque, int sprn)
{
    DisasContext *ctx = opaque;

    gen_op_store_hid0_601();