de2_tv.qsf

DE2_TV_m_write.rar是用来去处抖动的

set_location_assignment PIN_D5 -to TD_HS
set_location_assignment PIN_K9 -to TD_VS


# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name TOP_LEVEL_ENTITY DE2_TV

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP2C35F672C8
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH BUS-HOLD"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_instance_assignment -name IO_STANDARD LVTTL -to TD_DATA[0]
set_instance_assignment -name IO_STANDARD LVTTL -to TD_DATA[1]
set_instance_assignment -name IO_STANDARD LVTTL -to TD_DATA[2]
set_instance_assignment -name IO_STANDARD LVTTL -to TD_DATA[3]
set_instance_assignment -name IO_STANDARD LVTTL -to TD_DATA[4]
set_instance_assignment -name IO_STANDARD LVTTL -to TD_DATA[5]
set_instance_assignment -name IO_STANDARD LVTTL -to TD_DATA[6]
set_instance_assignment -name IO_STANDARD LVTTL -to TD_DATA[7]
set_instance_assignment -name IO_STANDARD LVTTL -to TD_HS
set_instance_assignment -name IO_STANDARD LVTTL -to TD_VS
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCLRCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCDAT
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACLRCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACDAT
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_XCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_BCLK
set_instance_assignment -name IO_STANDARD LVTTL -to ENET_DATA[0]
set_instance_assignment -name IO_STANDARD LVTTL -to SD_DAT3
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"

set_parameter -name CYCLONEII_SAFE_WRITE "\"RESTRUCTURE\""
set_location_assignment PIN_Y15 -to FL_ADDR[20]
set_location_assignment PIN_Y14 -to FL_ADDR[21]
set_instance_assignment -name IO_STANDARD LVTTL -to FL_ADDR[20]
set_instance_assignment -name IO_STANDARD LVTTL -to FL_ADDR[21]
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS16
set_global_assignment -name ENABLE_SIGNALTAP ON
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_global_assignment -name AUTO_ENABLE_SMART_COMPILE ON
set_parameter -name CYCLONEII_SAFE_WRITE "\"VERIFIED_SAFE\"" -to "dual_port:f0|altsyncram:altsyncram_component"
set_global_assignment -name FMAX_REQUIREMENT "50 MHz" -section_id OSC_50
set_instance_assignment -name CLOCK_SETTINGS OSC_50 -to OSC_50
set_global_assignment -name BASED_ON_CLOCK_SETTINGS OSC_50 -section_id DLY0
set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 16384 -section_id DLY0
set_instance_assignment -name CLOCK_SETTINGS DLY0 -to DLY0
set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=671116800" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BIT_CNTR_BITS=7" -section_id auto_signaltap_0
set_global_assignment -name SOURCE_FILE VGA_Param.h
set_global_assignment -name VERILOG_FILE DE2_TV2.v
set_global_assignment -name VERILOG_FILE write_FIFO1.v
set_global_assignment -name VERILOG_FILE DE2_TV1.v
set_global_assignment -name VERILOG_FILE TP_RAM.v
set_global_assignment -name VERILOG_FILE DIV.v
set_global_assignment -name VERILOG_FILE Sdram_Control_4Port/Sdram_RD_FIFO.v
set_global_assignment -name VERILOG_FILE Sdram_Control_4Port/Sdram_WR_FIFO.v
set_global_assignment -name SOURCE_FILE Sdram_Control_4Port/Sdram_Params.h
set_global_assignment -name VERILOG_FILE Sdram_Control_4Port/command.v
set_global_assignment -name VERILOG_FILE Sdram_Control_4Port/control_interface.v
set_global_assignment -name VERILOG_FILE Sdram_Control_4Port/sdr_data_path.v
set_global_assignment -name VERILOG_FILE Sdram_Control_4Port/Sdram_Control_4Port.v
set_global_assignment -name VERILOG_FILE Sdram_Control_4Port/Sdram_PLL.v
set_global_assignment -name VERILOG_FILE MAC_3.v
set_global_assignment -name VERILOG_FILE Reset_Delay.v
set_global_assignment -name VERILOG_FILE YCbCr2RGB.v
set_global_assignment -name VERILOG_FILE DE2_TV.v
set_global_assignment -name VERILOG_FILE I2C_AV_Config.v
set_global_assignment -name VERILOG_FILE I2C_Controller.v
set_global_assignment -name VERILOG_FILE PLL.v
set_global_assignment -name VERILOG_FILE SEG7_LUT.v
set_global_assignment -name VERILOG_FILE SEG7_LUT_8.v
set_global_assignment -name VERILOG_FILE YUV422_to_444.v
set_global_assignment -name VERILOG_FILE TD_Detect.v
set_global_assignment -name VERILOG_FILE ITU_656_Decoder.v
set_global_assignment -name VERILOG_FILE VGA_Ctrl.v
set_global_assignment -name VERILOG_FILE avar.v
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to OSC_50 -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=4096" -section_id auto_signaltap_0
set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_MEM_ADDRESS_BITS=12" -section_id auto_signaltap_0
set_global_assignment -name SIGNALTAP_FILE stp1.stp
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|DVAL" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[0]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[10]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[11]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[12]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[13]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[14]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[15]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[16]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[17]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[18]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[19]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[1]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[20]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[21]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[22]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[23]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[24]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[25]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[26]" -section_id auto_signaltap_0
set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|m_address[27]" -section_id auto_signaltap_0