mult_add_4f74.tdf

DE2_TV_m_write.rar是用来去处抖动的

--altmult_add ADDNSUB_MULTIPLIER_ACLR1="ACLR0" ADDNSUB_MULTIPLIER_PIPELINE_ACLR1="ACLR0" ADDNSUB_MULTIPLIER_PIPELINE_REGISTER1="CLOCK0" ADDNSUB_MULTIPLIER_REGISTER1="CLOCK0" CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEDICATED_MULTIPLIER_CIRCUITRY="AUTO" DEVICE_FAMILY="Cyclone II" DSP_BLOCK_BALANCING="Auto" INPUT_ACLR_A0="ACLR0" INPUT_ACLR_A1="ACLR0" INPUT_ACLR_A2="ACLR0" INPUT_ACLR_B0="ACLR0" INPUT_ACLR_B1="ACLR0" INPUT_ACLR_B2="ACLR0" INPUT_REGISTER_A0="CLOCK0" INPUT_REGISTER_A1="CLOCK0" INPUT_REGISTER_A2="CLOCK0" INPUT_REGISTER_B0="CLOCK0" INPUT_REGISTER_B1="CLOCK0" INPUT_REGISTER_B2="CLOCK0" INPUT_SOURCE_A0="DATAA" INPUT_SOURCE_A1="DATAA" INPUT_SOURCE_A2="DATAA" INPUT_SOURCE_B0="DATAB" INPUT_SOURCE_B1="DATAB" INPUT_SOURCE_B2="DATAB" MULTIPLIER1_DIRECTION="ADD" MULTIPLIER_ACLR0="ACLR0" MULTIPLIER_ACLR1="ACLR0" MULTIPLIER_ACLR2="ACLR0" MULTIPLIER_REGISTER0="CLOCK0" MULTIPLIER_REGISTER1="CLOCK0" MULTIPLIER_REGISTER2="CLOCK0" NUMBER_OF_MULTIPLIERS=3 OUTPUT_ACLR="ACLR0" OUTPUT_REGISTER="CLOCK0" port_addnsub1="PORT_UNUSED" port_signa="PORT_UNUSED" port_signb="PORT_UNUSED" REPRESENTATION_A="UNSIGNED" REPRESENTATION_B="SIGNED" SIGNED_ACLR_A="ACLR0" SIGNED_ACLR_B="ACLR0" SIGNED_PIPELINE_ACLR_A="ACLR0" SIGNED_PIPELINE_ACLR_B="ACLR0" SIGNED_PIPELINE_REGISTER_A="CLOCK0" SIGNED_PIPELINE_REGISTER_B="CLOCK0" SIGNED_REGISTER_A="CLOCK0" SIGNED_REGISTER_B="CLOCK0" WIDTH_A=8 WIDTH_B=17 WIDTH_RESULT=27 aclr0 clock0 dataa datab result CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--VERSION_BEGIN 7.0 cbx_alt_ded_mult_y 2006:11:20:15:44:42:SJ cbx_altmult_add 2007:01:10:13:40:18:SJ cbx_cycloneii 2006:09:29:19:03:26:SJ cbx_lpm_add_sub 2006:10:10:22:03:24:SJ cbx_mgl 2006:10:27:16:08:48:SJ cbx_padd 2006:11:07:16:02:02:SJ cbx_parallel_add 2006:02:24:16:54:52:SJ cbx_stratix 2006:09:18:10:47:42:SJ cbx_stratixii 2006:10:13:14:01:30:SJ cbx_util_mgl 2006:11:03:10:32:30:SJ  VERSION_END


--  Copyright (C) 1991-2007 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.


FUNCTION ded_mult_ob91 (aclr[3..0], clock[3..0], dataa[7..0], datab[16..0], ena[3..0])
RETURNS ( result[24..0]);
FUNCTION soft (in)
RETURNS ( out);

--synthesis_resources = dsp_9bit 2 lut 56 reg 54 
OPTIONS ALTERA_INTERNAL_OPTION = "{-to dffe10} POWER_UP_LEVEL=LOW;{-to dffe11} POWER_UP_LEVEL=LOW;{-to dffe12} POWER_UP_LEVEL=LOW;{-to dffe13} POWER_UP_LEVEL=LOW;{-to dffe14} POWER_UP_LEVEL=LOW;{-to dffe15} POWER_UP_LEVEL=LOW;{-to dffe16} POWER_UP_LEVEL=LOW;{-to dffe17} POWER_UP_LEVEL=LOW;{-to dffe18} POWER_UP_LEVEL=LOW;{-to dffe19} POWER_UP_LEVEL=LOW;{-to dffe20} POWER_UP_LEVEL=LOW;{-to dffe21} POWER_UP_LEVEL=LOW;{-to dffe22} POWER_UP_LEVEL=LOW;{-to dffe23} POWER_UP_LEVEL=LOW;{-to dffe24} POWER_UP_LEVEL=LOW;{-to dffe25} POWER_UP_LEVEL=LOW;{-to dffe26} POWER_UP_LEVEL=LOW;{-to dffe27} POWER_UP_LEVEL=LOW;{-to dffe28} POWER_UP_LEVEL=LOW;{-to dffe29} POWER_UP_LEVEL=LOW";
OPTIONS ALTERA_INTERNAL_OPTION = "{-to dffe30} POWER_UP_LEVEL=LOW;{-to dffe31} POWER_UP_LEVEL=LOW;{-to dffe32} POWER_UP_LEVEL=LOW;{-to dffe33} POWER_UP_LEVEL=LOW;{-to dffe34} POWER_UP_LEVEL=LOW;{-to dffe35} POWER_UP_LEVEL=LOW;{-to dffe36} POWER_UP_LEVEL=LOW;{-to dffe37} POWER_UP_LEVEL=LOW;{-to dffe38} POWER_UP_LEVEL=LOW;{-to dffe39} POWER_UP_LEVEL=LOW;{-to dffe4} POWER_UP_LEVEL=LOW;{-to dffe40} POWER_UP_LEVEL=LOW;{-to dffe41} POWER_UP_LEVEL=LOW;{-to dffe42} POWER_UP_LEVEL=LOW;{-to dffe43} POWER_UP_LEVEL=LOW;{-to dffe44} POWER_UP_LEVEL=LOW;{-to dffe45} POWER_UP_LEVEL=LOW;{-to dffe46} POWER_UP_LEVEL=LOW;{-to dffe47} POWER_UP_LEVEL=LOW;{-to dffe48} POWER_UP_LEVEL=LOW";
OPTIONS ALTERA_INTERNAL_OPTION = "{-to dffe49} POWER_UP_LEVEL=LOW;{-to dffe5} POWER_UP_LEVEL=LOW;{-to dffe50} POWER_UP_LEVEL=LOW;{-to dffe51} POWER_UP_LEVEL=LOW;{-to dffe52} POWER_UP_LEVEL=LOW;{-to dffe53} POWER_UP_LEVEL=LOW;{-to dffe54} POWER_UP_LEVEL=LOW;{-to dffe55} POWER_UP_LEVEL=LOW;{-to dffe56} POWER_UP_LEVEL=LOW;{-to dffe57} POWER_UP_LEVEL=LOW;{-to dffe6} POWER_UP_LEVEL=LOW;{-to dffe7} POWER_UP_LEVEL=LOW;{-to dffe8} POWER_UP_LEVEL=LOW;{-to dffe9} POWER_UP_LEVEL=LOW";

SUBDESIGN mult_add_4f74
( 
	aclr0	:	input;
	clock0	:	input;
	dataa[23..0]	:	input;
	datab[50..0]	:	input;
	result[26..0]	:	output;
) 
VARIABLE
	add58_result[25..0]	:	WIRE;
	add62_result[27..0]	:	WIRE;
	add66_result[1..0]	:	WIRE;
	ded_mult1 : ded_mult_ob91;
	ded_mult2 : ded_mult_ob91;
	ded_mult3 : ded_mult_ob91;
	dffe10 : dffe
		WITH (
			power_up = "low"
		);
	dffe11 : dffe
		WITH (
			power_up = "low"
		);
	dffe12 : dffe
		WITH (
			power_up = "low"
		);
	dffe13 : dffe
		WITH (
			power_up = "low"
		);
	dffe14 : dffe
		WITH (
			power_up = "low"
		);
	dffe15 : dffe
		WITH (
			power_up = "low"
		);
	dffe16 : dffe
		WITH (
			power_up = "low"
		);
	dffe17 : dffe
		WITH (
			power_up = "low"
		);
	dffe18 : dffe
		WITH (
			power_up = "low"
		);
	dffe19 : dffe
		WITH (
			power_up = "low"
		);
	dffe20 : dffe
		WITH (
			power_up = "low"
		);
	dffe21 : dffe
		WITH (
			power_up = "low"
		);
	dffe22 : dffe
		WITH (
			power_up = "low"
		);
	dffe23 : dffe
		WITH (
			power_up = "low"
		);
	dffe24 : dffe
		WITH (
			power_up = "low"
		);
	dffe25 : dffe
		WITH (
			power_up = "low"
		);
	dffe26 : dffe
		WITH (
			power_up = "low"
		);
	dffe27 : dffe
		WITH (
			power_up = "low"
		);
	dffe28 : dffe
		WITH (
			power_up = "low"
		);
	dffe29 : dffe
		WITH (
			power_up = "low"
		);
	dffe30 : dffe
		WITH (
			power_up = "low"
		);
	dffe31 : dffe
		WITH (
			power_up = "low"
		);
	dffe32 : dffe
		WITH (
			power_up = "low"
		);
	dffe33 : dffe
		WITH (
			power_up = "low"
		);
	dffe34 : dffe
		WITH (
			power_up = "low"
		);
	dffe35 : dffe
		WITH (
			power_up = "low"
		);
	dffe36 : dffe
		WITH (
			power_up = "low"
		);
	dffe37 : dffe
		WITH (
			power_up = "low"
		);
	dffe38 : dffe
		WITH (
			power_up = "low"
		);
	dffe39 : dffe
		WITH (
			power_up = "low"
		);
	dffe4 : dffe
		WITH (
			power_up = "low"
		);
	dffe40 : dffe
		WITH (
			power_up = "low"
		);
	dffe41 : dffe
		WITH (
			power_up = "low"
		);
	dffe42 : dffe
		WITH (
			power_up = "low"
		);
	dffe43 : dffe
		WITH (
			power_up = "low"
		);
	dffe44 : dffe
		WITH (
			power_up = "low"
		);
	dffe45 : dffe
		WITH (
			power_up = "low"
		);
	dffe46 : dffe
		WITH (
			power_up = "low"
		);
	dffe47 : dffe
		WITH (
			power_up = "low"
		);
	dffe48 : dffe
		WITH (
			power_up = "low"
		);
	dffe49 : dffe
		WITH (
			power_up = "low"
		);
	dffe5 : dffe
		WITH (
			power_up = "low"
		);
	dffe50 : dffe
		WITH (
			power_up = "low"
		);
	dffe51 : dffe
		WITH (
			power_up = "low"
		);
	dffe52 : dffe
		WITH (
			power_up = "low"
		);
	dffe53 : dffe
		WITH (
			power_up = "low"
		);
	dffe54 : dffe
		WITH (
			power_up = "low"
		);
	dffe55 : dffe
		WITH (
			power_up = "low"
		);
	dffe56 : dffe
		WITH (
			power_up = "low"
		);
	dffe57 : dffe
		WITH (
			power_up = "low"
		);
	dffe6 : dffe
		WITH (
			power_up = "low"
		);
	dffe7 : dffe
		WITH (
			power_up = "low"
		);
	dffe8 : dffe
		WITH (
			power_up = "low"
		);
	dffe9 : dffe
		WITH (
			power_up = "low"
		);
	sft59a[25..0] : soft;
	sft60a[25..0] : soft;
	sft61a[25..0] : soft;
	sft63a[27..0] : soft;
	sft64a[27..0] : soft;
	sft65a[27..0] : soft;
	sft67a[1..0] : soft;
	sft68a[1..0] : soft;
	sft69a[1..0] : soft;
	dataa_bus[23..0]	: WIRE;
	datab_bus[50..0]	: WIRE;
	ena0	: NODE;
	w137w	: WIRE;
	w139w	: WIRE;
	w141w	: WIRE;
	w143w	: WIRE;
	w145w	: WIRE;
	w147w	: WIRE;
	w149w	: WIRE;
	w151w	: WIRE;
	w153w	: WIRE;
	w155w	: WIRE;
	w157w	: WIRE;
	w159w	: WIRE;
	w161w	: WIRE;
	w163w	: WIRE;
	w165w	: WIRE;
	w167w	: WIRE;
	w169w	: WIRE;
	w171w	: WIRE;
	w173w	: WIRE;
	w175w	: WIRE;
	w177w	: WIRE;