de2_tv.cmp.logdb

DE2_TV_m_write.rar是用来去处抖动的

v1
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult3|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult2|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult3|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult2|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult3|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult2|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|mac_out71,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|cpu_0:the_cpu_0|cpu_0_mult_cell:the_cpu_0_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_out3,
DSP_BALANCING_IMPLEMENTATION,DSP_BLOCKS,avl_m_w:DUT|cpu_0:the_cpu_0|cpu_0_mult_cell:the_cpu_0_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|mac_out3,
PORT_SWAPPING,PORT_SWAP_TYPE_DSPMULT,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult2|mac_mult70,
PORT_SWAPPING,PORT_SWAP_TYPE_DSPMULT,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u2|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|mac_mult70,
PORT_SWAPPING,PORT_SWAP_TYPE_DSPMULT,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult3|mac_mult70,
PORT_SWAPPING,PORT_SWAP_TYPE_DSPMULT,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult2|mac_mult70,
PORT_SWAPPING,PORT_SWAP_TYPE_DSPMULT,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u1|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|mac_mult70,
PORT_SWAPPING,PORT_SWAP_TYPE_DSPMULT,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult3|mac_mult70,
PORT_SWAPPING,PORT_SWAP_TYPE_DSPMULT,avl_m_w:DUT|de2_tv2_0:the_de2_tv2_0|DE2_TV2:the_DE2_TV2|DE2_TV1:u9|YCbCr2RGB:u6|MAC_3:u0|altmult_add:ALTMULT_ADD_component|mult_add_4f74:auto_generated|ded_mult_ob91:ded_mult1|mac_mult70,