port_init.c

arm(44b0)端口初始化,在程序里面有较多的注释部分, 在具体情况下可用

void Port_Init(void)
{
	//CAUTION:Follow the configuration order for setting the ports. 
	// 1) setting value 
	 // 2) setting control register 
	 // 3) configure pull-up resistor.  

	//16bit data bus configuration  

	// PORT A GROUP
	/*  BIT 9		8	7	6	5	4	3	2	1	0	*/
	/*        A24	A23	A22	A21	A20	A19	A18	A17	A16	A0	*/	      
	/*        1		1	1	1	1	1	1	1	1	1	*/
	rPCONA = 0x1ff;	

	// PORT B GROUP
	/*  BIT 10	9		8		7		6		5		4		3		2		1		0		*/
	/*	/CS5	/CS4	/CS3	/CS2	/CS1	nWBE3	nWBE2	/SRAS	/SCAS	SCLK	SCKE	*/
	/*	EXT		NIC		USB		IDE		SMC		NC		NC		Sdram	Sdram	Sdram	Sdram	*/
	/*      1,        1,   1,   1,    1,    1,       1,     1,    1,    1,   1          */
//	rPDATB = 0x7ff;
	rPCONB = 0x7ff;
    
	//PORT C GROUP
	//BUSWIDTH=16													*/
	/*  PC15	14		13		12		11			10		9		8	*/
	/*	I	    I	    RXD1	TXD1	AD_D549(I)	RCS(O)	RUD(O)	RINC(O)	*/
	/*  00		00		11		11		00			01		01		01	*/
//						11		11
	/*  PC7		6		5		4		3		2		1		0	*/
	/*   O		O		O		O		O		O		O		I	*/
	/*   VD4	VD5		VD6		VD7		XCS     XSCK	XSI		XSO*/
	/*   11		11		11		11		01		01		01		00	*/
	rPDATC = 0xffff;	//All IO is high
	rPCONC = 0x0f15ff54;
	rPUPC  = 0x0000;	//PULL UP RESISTOR should be enabled to I/O
	rPDATC=rPDATC|0x70e; //
	//PORT D GROUP
	/*  PORT D GROUP(I/O OR LCD)										*/
	/*  BIT7		6		5		4		3		2		1		0	*/
	/*      VF		VM		VLINE	VCLK	VD3		VD2		VD1		VD0	*/
	/*	   10		01		10		10		10		10		10		10	*/
	rPDATD= 0xff;
	rPCOND= 0x9aaa;	
	rPUPD = 0x0;
	//These pins must be set only after CPU's internal LCD controller is enable
	
	//PORT E GROUP 
	/*  Bit 8	7	6	5	4	3	2	1	0	*/
	/*      ENDAIN	CLEARCOL	DIN	SSCLK	AC_ZERO   DACSSTEP		RXD0	TXD0	DIN5615	*/ 
	/*      00	01	01	01	00	00	00	01	01	*/
	rPDATE	= 0x1ff;
	rPCONE	= 0x05425;
	rPUPE	= 0x6;
	
	//PORT F GROUP
	/*  Bit8		7		6		5		 4		3		2			1			0		*/   
	/*  CS5615  CS549	 CLK549		RCLK595	 RD_LST READY	FIFO_WEN	SRCLK595	SER595	*/
	/*	001		001		001			001		 01		00		01			01			01		*/
	rPDATF = 0x1ff;
	rPCONF = 0x92515; 
//	rPCONF = 0x024555;
	rPUPF  = 0x0;

	//PORT G GROUP
	/*  BIT7		6		5		4		3		2		1		0	 */
	/*	NC  	  	S2	  	S1_3   	S1_2    S1_1    NC     	S1_0    TRI_S	*/
	/*  00        	01      01      01      01      00      01      00       */
	rPDATG = 0xff;
	rPCONG = 0x1544;  // use INT3,INT5
//	rPCONG = 0x000c;  // use INT1
	rPUPG  = 0x0;	//should be enabled  
	
	rSPUCR=0x7;  //D15-D0 pull-up disable

	/*定义非Cache区*/
	rNCACHBE0=((Non_Cache_End>>12)<<16)|(Non_Cache_Start>>12); 
	/*所有的外部硬件中断为低电平触发*/
//	rEXTINT=0x22222222; // INT0-INT7为下沿触发
//	rEXTINT=0x44444444; // INT0-INT7为上沿触发
//	rEXTINT=0x0;  // INT1为下沿触发
//	rEXTINT=0x10;  // INT1为下沿触发


	rPDATF = rPDATF|0x10;   // RD_LST=1 
	rPDATD= rPDATD |0x40;  // VM=1


}