📄 ram.asm
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;************************************************
; Main Program Data Define *
;************************************************
.data
;===================Pin Difinition====================
I_RF_receive equ P0.0
O_Music_Clk equ P1.0
Om_Music_Clk equ P1M.0
O_Music_Data0 equ P1.1
Om_Music_Data0 equ P1M.1
O_Music_Data1 equ P1.2
Om_Music_Data1 equ P1M.2
O_Ctrl00 equ P2.0
Om_Ctrl00 equ P2M.0
O_Ctrl01 equ P2.1
Om_Ctrl01 equ P2M.1
O_Ctrl10 equ P2.2
Om_Ctrl10 equ P2M.2
O_Ctrl11 equ P2.3
Om_Ctrl11 equ P2M.3
O_Ctrl20 equ P2.4
Om_Ctrl20 equ P2M.4
O_Ctrl21 equ P2.5
Om_Ctrl21 equ P2M.5
O_left_Led equ P2.6
Om_left_Led equ P2M.6
O_right_Led equ P2.7
Om_right_Led equ P2M.7
;=============== Usual work register =================
IDcode equ #11000000b ;bit[5...0]=000000
motorflag ds 1
forward_f equ motorflag.0
backward_f equ motorflag.1
leftward_f equ motorflag.2
rightward_f equ motorflag.3
upward_f equ motorflag.4
downward_f equ motorflag.5
ledflag ds 1
leftled_f equ ledflag.0
rightled_f equ ledflag.1
forback_pwm ds 2
leftright_pwm ds 2
updown_pwm ds 2
motorstep ds 1
Noforbackval equ #00000000b ;
forwardval equ #00001111b ;1:1
fastforwardval equ #00111111b ;3:1
backwardval equ #00111111b ;3:1
slowbackwardval equ #00001111b ;1:1
Noleftrightval equ #00000000b ;
leftrightval equ #00000111b ;3:5
Noupdownval equ #00000000b ;
updownval equ #00000111b ;3:5
;RF receive information
RF_Time_step ds 1
RFflag ds 1
RF_data_val equ #8
RF_data_count ds 1
RF_receivebuf ds 1
RF_receiveRam ds 1
RF_pilot_detect_f equ RFflag.0
RF_receive_start_f equ RFflag.1
Time2ms_f equ RFflag.2
RF_receive_data_f equ RFflag.3
RF_step_ctr equ RFflag.4
RF_receive_finish equ RFflag.5
;================ Temp work register =================
wk00 ds 1 ; Temp Register
;wk01 ds 1 ; X
;wk02 ds 1 ; X
;wk03 ds 1 ; X
;wk04 ds 1 ; X
;wk05 ds 1 ; X
;wk06 ds 1 ; X
;wk07 ds 1 ; X
;wk08 ds 1 ; X
;wk09 ds 1 ; X
;wk10 ds 1 ; X
;wk11 ds 1 ; X
;wk12 ds 1 ; Temp Register
;============================= Clear Ram =============================
@Rambank0 equ 1 ; 0: No bank0 ; 1: Have bank0
@Rambank1 equ 0 ; 0: No bank1 ; 1: Have bank1
@Rambank2 equ 0 ; 0: No bank2 ; 1: Have bank2
@Rambank3 equ 0 ; 0: No bank3 ; 1: Have bank3
@Rambank4 equ 0 ; 0: No bank4 ; 1: Have bank4
@Rambank15 equ 0 ; 0: No bank15 ; 1: Have bank15
if @Rambank0 == 1
@Rambank0_val equ #48 ; xx= 2fh,3fh,7fh...
endif
if @Rambank1 == 1
@Rambank1_val equ #xxh ; xx= 2fh,3fh,7fh...
endif
if @Rambank2 == 1
@Rambank2_val equ #xxh ; xx= 2fh,3fh,7fh...
endif
if @Rambank3 == 1
@Rambank3_val equ #xxh ; xx= 2fh,3fh,7fh...
endif
if @Rambank4 == 1
@Rambank4_val equ #xxh ; xx= 2fh,3fh,7fh...
endif
if @Rambank15 == 1
@Rambank15_val equ #xxh ; xx= 1fh...
endif
;============================ Application =============================
; Power down
@Powerdown_set equ 0 ; 0: System not powerdown ; 1: System will power down
; Green mode
@GreenMode_set equ 0 ; 0: System not Greenmode ; 1: System will Greenmode
; Oscm setting
@Oscm_set equ #01000000b
; Pedge setting ; 0: Not use pedge register
@Pedge_set equ 2 ; 1: Wakeup by low level ; 2: Wakeup by falling edge
; 3: Wakeup by rising edge ; 4: Wakeup by change triggle
IF @Pedge_set != 0
@Pedge_low_val equ #00000000b
@Pedge_fall_val equ #10001000b
@Pedge_rise_val equ #10010000b
@Pedge_triggle_val equ #10011000b
ENDIF
; A/D setting
@ADappl_set equ 0 ; 0: Not use A/D ; 1: Use A/D
IF @ADappl_set == 1
; @ADM_set equ #xxxx1xxxb
@ADLEN_set equ xx ; 0=8bit A/D ; 1=12bit A/D
@ADCKS_set equ xx ; 0=Fcpu/16 ; 1=Fcpu/8
@AD0_setval equ #11011000b
@AD1_setval equ #11011001b
@AD2_setval equ #11011010b
@AD3_setval equ #11011011b
@AD4_setval equ #11011100b
@AD5_setval equ #11011101b
@AD6_setval equ #11011110b
@AD7_setval equ #11011111b
@AD_overval equ #00000000b
IF @ADLEN_set == 1
@advalueH ds 1
@advalueL ds 1
ELSE
@advalue ds 1
ENDIF
ENDIF
; D/A setting
@DAappl_set equ 0 ; 0: Not use D/A ; 1: Use D/A
; LCD display
@Lcdappl_set equ 0 ; 0: Not use Lcd driver ; 1: Use Lcd driver
IF @Lcdappl_set == 1
@Lcdm_set equ #11x1x1xxb
;bit0: RCLK 0: crystal 32.768KHz / 1: RC
;bit1: P3LCD 0: LCD segment / 1: input and pull up registor
@RCLK_set equ xx ; 0: crystal 32.768KHz / 1: RC
@P3LCD_set equ xx ; 0: LCD segment / 1: input and pull up registor
ENDIF
;============================== IO port ===============================
@ChipP0 equ 1 ; 1: P0 exist , 0: P0 not exist
@ChipP1 equ 1 ; 1: P1 exist , 0: P1 not exist
@ChipP2 equ 1 ; 1: P2 exist , 0: P2 not exist
@ChipP3 equ 0 ; 1: P3 exist , 0: P3 not exist
@ChipP4 equ 0 ; 1: P4 exist , 0: P4 not exist
@ChipP5 equ 0 ; 1: P5 exist , 0: P5 not exist
@ChipP6 equ 0 ; 1: P6 exist , 0: P6 not exist
@ChipP7 equ 0 ; 1: P7 exist , 0: P7 not exist
;Pur register Set/Port Value Set/IO direction Set
@Purmode equ 2 ; 0=No Pur register ; 1=Bit set ; 2=Port set
;----------------------------------------------
IF @Purmode == 2
@Pur_set equ 00000001b ; Ex. 00110001b --> p0UR&p4UR&p5UR=1
ENDIF
;----------------------------------------------
IF @ChipP0 == 1
IF @Purmode == 1
@P0ur_set equ #xxxxxxxxb
ENDIF
ENDIF
;--------------
IF @ChipP1 == 1
@p1set equ #00000000b ; In/Output value
@p1Wset equ #00000000b ; 0: No wakeup / 1: Wakeup
@p1Mset equ #11111111b ; 0: Input / 1: Output
IF @Purmode == 1
@p1ur_set equ #xxxxxxxxb
ENDIF
ENDIF
;--------------
IF @ChipP2 == 1
@p2set equ #00000000b ; In/Output value
@p2Mset equ #11111111b ; 0: Input / 1: Output
IF @Purmode == 1
@p2ur_set equ #xxxxxxxxb
ENDIF
ENDIF
;--------------
IF @ChipP3 == 1
@p3set equ #xxxxxxxxb ; In/Output value
@p3Mset equ #xxxxxxxxb ; 0: Input / 1: Output
IF @Purmode == 1
@p3ur_set equ #xxxxxxxxb
ENDIF
ENDIF
;--------------
IF @ChipP4 == 1
@p4set equ #xxxxxxxxb ; In/Output value
@p4Mset equ #xxxxxxxxb ; 0: Input / 1: Output
IF @Purmode == 1
@p4ur_set equ #xxxxxxxxb
ENDIF
ENDIF
;--------------
IF @ChipP5 == 1
@p5set equ #xxxxxxxxb ; In/Output value
@p5Mset equ #xxxxxxxxb ; 0: Input / 1: Output
IF @Purmode == 1
@p5ur_set equ #xxxxxxxxb
ENDIF
ENDIF
;--------------
IF @ChipP6 == 1
@p6set equ #xxxxxxxxb ; In/Output value
@p6Mset equ #xxxxxxxxb ; 0: Input / 1: Output
IF @Purmode == 1
@p6ur_set equ #xxxxxxxxb
ENDIF
ENDIF
;--------------
IF @ChipP7 == 1
@p7set equ #xxxxxxxxb ; In/Output value
@p7Mset equ #xxxxxxxxb ; 0=Input / 1=Output
IF @Purmode == 1
@p7ur_set equ #xxxxxxxxxb
ENDIF
ENDIF
;===================== Interrupt data Define ======================
accbuf ds 1
pflagbuf ds 1
;ybuf ds 1
;zbuf ds 1
;rbuf ds 1
;xbuf ds 1
;hbuf ds 1
;lbuf ds 1
intwk00 ds 1 ;interrupt work register0
;intwk01 ds 1 ;interrupt work register1
;intwk02 ds 1 ;interrupt work register2
;intwk03 ds 1 ;interrupt work register3
;intwk04 ds 1 ;interrupt work register4
@ChipP00INT equ 1 ; 1: P00INT exist , 0: P00INT don't care
@ChipP01INT equ 0 ; 1: P00INT exist , 0: P00INT don't care
@ChipP02INT equ 0 ; 1: P00INT exist , 0: P00INT don't care
@ChipT0INT equ 0 ; 1: T0INT exist , 0: T0INT don't care
@ChipSIOINT equ 0 ; 1: SIOINT exist , 0: SIOINT don't care
@ChipTC0INT equ 1 ; 1: TC0INT exist , 0: TC0INT don't care
@ChipTC1INT equ 0 ; 1: TC1INT exist , 0: TC1INT don't care
@ChipADCINT equ 0 ; 1: ADINT exist , 0: ADINT don't care
;====================== Interrupt Interface data define =====================
IF @ChipSIOINT == 1
@Siom_set equ #xxxx1xxxb
ENDIF
@Systimer_set equ 2 ;0: No system time base/1: T0 time base/2: Tc0 time base/3: Tc1 time base
IF @Systimer_set != 0
@intgnd ds 1 ;INT interface register
ENDIF
@SysT0 equ 0 ; 1: Use T0 / 0: Not use T0
@SysTc0 equ 1 ; 1: Use Tc0 / 0: Not use Tc0
@SysTc1 equ 0 ; 1: Use Tc1 / 0: Not use Tc1
IF @SysT0==1
@SysT0c equ #xxh ; set Pre-scalar=fcpu/
@SysT0m equ #xxh ; set count steps
ENDIF
IF @SysTc0==1
@SysTc0c equ #38h ; set Pre-scalar=fcpu/
@SysTc0m equ #60h ; set count steps
@SysTc0R_set equ 0 ; 1: Use Tc0R / 0: Not use TC0R
ENDIF
IF @SysTc1==1
@SysTc1c equ #xxh ; set Pre-scalar=fcpu/
@SysTc1m equ #xxh ; set count steps
@SysTc1R_set equ 0 ; 1: Use Tc1R / 0: Not use TC1R
ENDIF
IF @Systimer_set != 0
IRQ=0
@Sys1msIRQ equ @intgnd.IRQ ;IRQ 5ms flag ;1ms
IRQ=IRQ+1
@Sys2msIRQ equ @intgnd.IRQ ;IRQ 10ms flag ;2ms
;IRQ=IRQ+1
;@Sys50msIRQ equ @intgnd.IRQ ;IRQ 50ms flag
;IRQ=IRQ+1
;@Sys100msIRQ equ @intgnd.IRQ ;IRQ 100ms flag
IRQ=IRQ+1
@Sys200msIRQ equ @intgnd.IRQ ;IRQ 200ms flag
;IRQ=IRQ+1
;@Sys300msIRQ equ @intgnd.IRQ ;IRQ 300ms flag
;IRQ=IRQ+1
;@Sys400msIRQ equ @intgnd.IRQ ;IRQ 400ms flag
;IRQ=IRQ+1
;@Sys500msIRQ equ @intgnd.IRQ ;IRQ 500ms flag
;IRQ=IRQ+1
;@Sys600msIRQQ equ @intgnd.IRQ ;IRQ 600ms flag
;IRQ=IRQ+1
;@Sys700msIRQ equ @intgnd.IRQ ;IRQ 700ms flag
;IRQ=IRQ+1
;@Sys800msIRQ equ @intgnd.IRQ ;IRQ 800ms flag
;IRQ=IRQ+1
;@Sys900msIRQ equ @intgnd.IRQ ;IRQ 900ms flag
;IRQ=IRQ+1
; @Sys1sIRQ equ @intgnd.IRQ ;IRQ 1000ms flag
IRQ=IRQ+1
@Sys5sIRQ equ @intgnd.IRQ ;IRQ 5000ms flag ;1s
;IRQ=IRQ+1
;@Sys10sIRQ equ @intgnd.IRQ ;IRQ 10000ms flag
;IRQ=IRQ+1
;@Sys30sIRQ equ @intgnd.IRQ ;IRQ 30000ms flag
;IRQ=IRQ+1
;@Sys60sIRQ equ @intgnd.IRQ ;IRQ 60000ms flag
;IRQ=IRQ+1
;@Sys300sIRQ equ @intgnd.IRQ ;IRQ 300000ms flag
IFDEF @Sys2msIRQ
@Sys2msC ds 1 ;count for 10ms INT
@Sys2msStep equ #2 ;count step of 5ms INT
ENDIF
IFDEF @Sys50msIRQ
@Sys50msC ds 1 ;count for 50ms INT
@Sys50msStep equ #10 ;count step of 5ms INT
ENDIF
IFDEF @Sys100msIRQ
@Sys100msC ds 1 ;count for 100ms INT
@Sys100msStep equ #20 ;count step of 5ms INT
ENDIF
IFDEF @Sys200msIRQ
@Sys200msC ds 1 ;count for 200ms INT
@Sys200msStep equ #200 ;count step of 5ms INT
ENDIF
IFDEF @Sys300msIRQ
@Sys300msC ds 1 ;count for 300ms INT
@Sys300msStep equ #60 ;count step of 5ms INT
ENDIF
IFDEF @Sys400msIRQ
@Sys400msC ds 1 ;count for 400ms INT
@Sys400msStep equ #80 ;count step of 5ms INT
ENDIF
IFDEF @Sys500msIRQ
@Sys500msC ds 1 ;count for 500ms INT
@Sys500msStep equ #100 ;count step of 5ms INT
ENDIF
IFDEF @Sys600msIRQQ
@Sys600msC ds 1 ;count for 600ms INT
@Sys600msStep equ #120 ;count step of 5ms INT
ENDIF
IFDEF @Sys700msIRQ
@Sys700msC ds 1 ;count for 700ms INT
@Sys700msStep equ #140 ;count step of 5ms INT
ENDIF
IFDEF @Sys800msIRQ
@Sys800msC ds 1 ;count for 800ms INT
@Sys800msStep equ #160 ;count step of 5ms INT
ENDIF
IFDEF @Sys900msIRQ
@Sys900msC ds 1 ;count for 900ms INT
@Sys900msStep equ #180 ;count step of 5ms INT
ENDIF
IFDEF @Sys1sIRQ
@Sys1sC ds 1 ;count for 1s INT
@Sys1sStep equ #200 ;count step of 5ms INT
ENDIF
IFDEF @Sys5sIRQ
@Sys5sC ds 2 ;count for 5s INT
@Sys5sStepH equ #2+1 ;count step of 1160ms INT ;4
@Sys5sStepL equ #232 ;count step of 5ms INT
ENDIF
IFDEF @Sys10sIRQ
@Sys10sC ds 2 ;count for 10s INT
@Sys10sStepH equ #7+1 ;count step of 1040ms INT
@Sys10sStepL equ #208 ;count step of 5ms INT
ENDIF
IFDEF @Sys30sIRQ
@Sys30sC ds 2 ;count for 30s INT
@Sys30sStepH equ #23+1 ;count step of 560ms INT
@Sys30sStepL equ #112 ;count step of 5ms INT
ENDIF
IFDEF @Sys60sIRQ
@Sys60sC ds 2 ;count for 60s INT
@Sys60sStepH equ #46+1 ;count step of 1120ms INT
@Sys60sStepL equ #224 ;count step of 5ms INT
ENDIF
IFDEF @Sys300sIRQ
@Sys300sC ds 2 ;count for 300s INT
@Sys300sStepH equ #234+1 ;count step of 480ms INT
@Sys300sStepL equ #96 ;count step of 5ms INT
ENDIF
ENDIF
;Others
bit0 equ 0
bit1 equ 1
bit2 equ 2
bit3 equ 3
bit4 equ 4
bit5 equ 5
bit6 equ 6
bit7 equ 7⌨️ 快捷键说明
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