gps source code.txt

用单片机控制GPS模块C51源代码。。希望对大家了解单片机控制GPS有帮助。

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};

/**
 *   Select the desired RAM profile to generate a 1200 or 2200Hz FM tone
 *
 *   @param state true for 2200Hz tone; false for 1200Hz tone
 */
inline void ddsAFSK (boolean state)
{
    if (state)
        output_high (IO_PS0);
    else
        output_low (IO_PS0);
}

/**
 *   Initialize the DDS regsiters and RAM.
 */
void ddsInit()
{
    uint16_t i;

    // Setup the SPI port for the DDS interface.    
    setup_spi( SPI_MASTER | SPI_L_TO_H | SPI_CLK_DIV_4 | SPI_XMIT_L_TO_H );    

    // Turn off the output.
    output_low (IO_OSK);

    // CFR1 (Control Function Register No. 1)
    output_low (IO_CS);
    spi_write (0x00);

    spi_write (0x83);  // RAM Enable, OSK Enable, Auto OSK keying
    spi_write (0x00);
    spi_write (0x02);  // SDIO input only
    spi_write (0x40);  // Power down comparator circuit
    output_high (IO_CS);

    // RSCW0 (RAM Control Segment Word No. 0)
    output_low (IO_CS);
    spi_write (0x07);

    spi_write (0x38);   // Ramp rate LSB - 1200 Hz
    spi_write (0x01);   // Ramp rate MSB
    spi_write (0xff);   // RAM segment 0 address range 0x000 to 0x0ff
    spi_write (0x00);
    spi_write (0x80);   // Circular buffer mode
    output_high (IO_CS);

    // RSCW1 (RAM Control Segment Word No. 1)
    output_low (IO_CS);
    spi_write (0x08);

    spi_write (0xaa);   // Ramp rate LSB - 2200 Hz
    spi_write (0x00);   // Ramp rate MSB
    spi_write (0xff);   // RAM segment 1 address range 0x100 to 0x1ff
    spi_write (0x01);
    spi_write (0x84);   // Circular buffer mode
    output_high (IO_CS);

    // Strobe the DDS so the RAM controller knows where to write the RAM data.
    output_high (IO_UPDATE);
    output_low (IO_UPDATE);
    
    // Select RAM profile 0.
    output_low (IO_PS0);
    output_low (IO_PS1);

    // Write 256 bytes into RAM locations 0x000 to 0x0ff
    output_low (IO_CS);
    spi_write (0x0b);

    for (i = 0; i < 256; ++i) {
        spi_write ((f[i] >> 24) & 0xff);
        spi_write ((f[i] >> 16) & 0xff);
        spi_write ((f[i] >> 8) & 0xff);
        spi_write (f[i] & 0xff);
    }
    
    output_high (IO_CS);

    // Select RAM profile 1.
    output_high (IO_PS0);

    // Write 256 bytes into RAM location 0x100 to 0x1ff
    output_low (IO_CS);
    spi_write (0x0b);

    for (i = 0; i < 256; ++i) {
        spi_write ((f1[i] >> 24) & 0xff);
        spi_write ((f1[i] >> 16) & 0xff);
        spi_write ((f1[i] >> 8) & 0xff);
        spi_write (f1[i] & 0xff);
    }

    output_high (IO_CS);

    // Select RAM profile 0.
    output_low (IO_PS0);

    // ASF (Amplitude Scale Factor) to full scale (0x3fff).
    ddsSetAmplitude (0x3fff);

    // ARR (Amplitude Ramp Rate) to 15mS for OSK
    output_low (IO_CS);
    spi_write (0x03);

    spi_write (0xff);
    output_high (IO_CS);

    // CFR2 (Control Function Register No. 2)
    output_low (IO_CS);
    spi_write (0x01);

    spi_write (0x00);     // Unused register bits
    spi_write (0x00);
    spi_write (0xa4);     // 20x reference clock multipler, high VCO range, nominal charge pump current
    output_high (IO_CS);

    // Set the frequency tuning word. 3.0 MHz
    ddsSetFreq (0x2555555);
    
    // CFR1 (Control Function Register No. 1)
    output_low (IO_CS);
    spi_write (0x00);

    spi_write (0x03);  // Disable RAM Enable, OSK Enable, Auto OSK keying  was 0x83
    spi_write (0x00);
    spi_write (0x02);  // SDIO input only
    spi_write (0x40);  // Power down comparator circuit
    output_high (IO_CS);

    // Strobe the part so we apply the updates.
    output_high (IO_UPDATE);
    output_low (IO_UPDATE);
}


void ddsSetAmplitude (uint16_t amplitude)
{
    output_low (IO_CS);
    spi_write (0x02);

    spi_write ((amplitude >> 8) & 0xff);
    spi_write (amplitude & 0xff);
    output_high (IO_CS);

    // Strobe the part so we apply the updates.
    output_high (IO_UPDATE);
    output_low (IO_UPDATE);
}

/**
 *   Set the output phase.
 *
 *   @param phase true for 180 degree phase shift; false for 0 degree phase shift
*/
void ddsPhase (boolean phase)
{
    // Set the POW0 (Phase Offset Word 0) to 0 or 180 degrees.
    output_low (IO_CS);
    spi_write (0x05);   

    if (phase) {
        spi_write (0x20);
        spi_write (0x00);
    } else {
        spi_write (0x00);
        spi_write (0x00);
    }

    output_high (IO_CS);

    // Strobe the DDS to write the phase change.
    output_high (IO_UPDATE);
    output_low (IO_UPDATE);
}

/**
 *    Turn on the DDS output.
 *
 *    @param state true to activate; otherwise false
 */
inline void ddsPTT (boolean state)
{
    if (state)
        output_high (IO_OSK);
    else
        output_low (IO_OSK);
}

/**
 *  Set DDS frequency tuning word.  The output frequency is equal to RefClock * (ftw / 2 ^ 32).
 *
 *  @param ftw Frequency Tuning Word
 */
void ddsSetFreq (uint32_t ftw)
{
    // Set FTW0 (Frequency Tuning Word 0)
    output_low (IO_CS);
    spi_write (DDS_AD9954_FTW0);

    spi_write ((ftw >> 24) & 0xff);
    spi_write ((ftw >> 16) & 0xff);
    spi_write ((ftw >> 8) & 0xff);
    spi_write (ftw & 0xff);

    output_high (IO_CS);
    
    // Strobe the DDS to set the frequency.
    output_high (IO_UPDATE);
    output_low (IO_UPDATE);     
}

/**
 *  Set DDS frequency tuning word.  The output frequency is equal to RefClock * (ftw / 2 ^ 32).
 *
 *  @param ftw Frequency Tuning Word
 */
void ddsSetFSKFreq (uint32_t ftw0, uint32_t ftw1)
{
    // Set FTW0 (Frequency Tuning Word 0)
    output_low (IO_CS);
    spi_write (DDS_AD9954_FTW0);

    spi_write ((ftw0 >> 24) & 0xff);
    spi_write ((ftw0 >> 16) & 0xff);
    spi_write ((ftw0 >> 8) & 0xff);
    spi_write (ftw0 & 0xff);

    output_high (IO_CS);
    
    // Set FTW0 (Frequency Tuning Word 1)
    output_low (IO_CS);
    spi_write (DDS_AD9954_FTW1);

    spi_write ((ftw1 >> 24) & 0xff);
    spi_write ((ftw1 >> 16) & 0xff);
    spi_write ((ftw1 >> 8) & 0xff);
    spi_write (ftw1 & 0xff);

    output_high (IO_CS);
    
    // Strobe the DDS to set the frequency.
    output_high (IO_UPDATE);
    output_low (IO_UPDATE);     
}

/** 
 *   Set the DDS to run in A-FSK, FSK, or PSK31 mode
 *
 *   @param mode <i>DDS_MODE_APRS</i>, <i>DDS_MODE_PSK31</i>, or <i>DDS_MODE_HF_APRS</i> constant
 */
void ddsSetMode (DDS_MODE mode)
{
    switch (mode) {
        case DDS_MODE_APRS:
            // CFR0 (Control Function Register No. 0)
            output_low (IO_CS);
            spi_write (DDS_AD9954_CFR0);

            spi_write (0x83);  // Set RAM Enable, OSK Enable, Auto OSK keying
            spi_write (0x00);
            spi_write (0x02);  // SDIO input only
            spi_write (0x40);  // Power down comparator circuit
            output_high (IO_CS);
            break;
            
        case DDS_MODE_PSK31:
            // CFR0 (Control Function Register No. 0)
            output_low (IO_CS);
            spi_write (DDS_AD9954_CFR0);

            spi_write (0x03);  // Clear RAM Enable, OSK Enable, Auto OSK keying
            spi_write (0x00);
            spi_write (0x02);  // SDIO input only
            spi_write (0x40);  // Power down comparator circuit
            output_high (IO_CS);
            break;

        case DDS_MODE_HF_APRS:
            // CFR0 (Control Function Register No. 0)
            output_low (IO_CS);
            spi_write (DDS_AD9954_CFR0);

            spi_write (0x03);  // Clear RAM Enable, OSK Enable, Auto OSK keying
            spi_write (0x20);  // Enable linear sweep
            spi_write (0x02);  // SDIO input only
            spi_write (0x40);  // Power down comparator circuit
            output_high (IO_CS);

            // NOTE: The sweep rate requires 1/4 of a bit time to transition.
            // 200Hz delta = 2236 counts  (200Hz / 384MHz) * 2 ^ 32
            // SYNC_CLK = 96MHz  1/96MHz * 2236 * 36 = 838uS

            // NLSCW (Negative Linear Sweep Control Word)
            output_low (IO_CS);
            spi_write (DDS_AD9954_NLSCW);

            spi_write (36);    // Falling sweep ramp rate word
            spi_write (0x00);  // Delta frequency tuning word
            spi_write (0x00);
            spi_write (0x00);
            spi_write (0x01); 
            output_high (IO_CS);

            // PLSCW (Positive Linear Sweep Control Word)
            output_low (IO_CS);
            spi_write (DDS_AD9954_PLSCW);

            spi_write (36);    // Falling sweep ramp rate word
            spi_write (0x00);  // Delta frequency tuning word
            spi_write (0x00);
            spi_write (0x00);
            spi_write (0x01); 
            output_high (IO_CS);
            break;
            
    } // END switch
    
    // Strobe the DDS to change the mode.
    output_high (IO_UPDATE);
    output_low (IO_UPDATE);      
}

// ****************************************************************************
//   GPS
//
#define GPS_WAIT_MSG 0
#define GPS_GGA_MSG 1
#define GPS_RMC_MsG 2

// The maximum length of a single NMEA GPS message
#define GPS_BUFFER_SIZE 80

uint8_t gpsState, gpsIndex;
uint8_t gpsBuffer[GPS_BUFFER_SIZE]; 

static char GPS_GGA_TEXT[] = "$GPGGA";
static char GPS_RMC_TEXT[] = "$GPRMC";

/**
 *   Get a pointer to the GPS buffer that contains the NMEA message.
 *
 *   @return pointer to NULL terminated string
 */
char *gpsGetBuffer()
{
    return gpsBuffer;
}

/** 
 *    Initialize the GPS subsystem.
 */
void gpsInit()
{
    gpsState = GPS_WAIT_MSG;
    gpsIndex = 0;