pci9052sw.h

用C语言写得PCI8052的WDM结构驱动程序

/***********************************************************************/
/* -------------[   PCI 9052芯片的编程接口定义(2)  ver 0.90 ]-------------*/
/***********************************************************************/

//  模块名称：9052sw.h
//  Programmer：桂凯    西安电子科技大学
// 
//  email：[e-mail]
//  All right reserved 

//
// 2002.6.24 最初的框架 
// 2002.6.26 增添IOCTL代码
// 
#define _PCI9052_DEF_

#define DEVICE_NAME_STRING  L"pci9052"

#define MAX_BUS_NUMBER        255

#define MAX_BUFFER_NUM	      0x400	
typedef ULONG   DWORD;
typedef USHORT  WORD;
typedef UCHAR   BYTE;

//#define STATUS_NO_SUCH_DEVICE            ((NTSTATUS)0xC000000EL)

typedef struct _PCI9052_LOCAL_CONFIGURATION_REGISTERS {
	DWORD   local_addr_space_range0;
	DWORD   local_addr_space_base0;
	DWORD   local_addr_space_bus0;
	DWORD   interrput_control_status;
	DWORD   cntrl;
} PCI9052_LOCAL_CONFIGURATION_REGISTERS;

typedef struct _PCI9052_RUNTIME_REGISTERS {
	DWORD   interrupt_control;
	DWORD   reserved;
} PCI9052_RUNTIME_REGISTERS;

// the main device structure
typedef struct _PCI9052_DEVICE_EXTENSION {

//
        ULONG             data[1];
        BOOLEAN             data_ready;
        ULONG             int_counter;
        ULONG             buffer[MAX_BUFFER_NUM];
       
        PHYSICAL_ADDRESS  portStart;
        ULONG             portLength;              
        PVOID             PlxRegisterBaseAddr;
        ULONG             interruptLevel;
        ULONG             interruptVector;
        ULONG             mappedSystemVector;         
        ULONG			BusNumber;
        PCI_SLOT_NUMBER         SlotNumber;
        ULONG                   BaseAddresses[PCI_TYPE0_ADDRESSES];
        PHYSICAL_ADDRESS	Local_space0;
        PVOID  			MapedIoLocalSpace0BaseAddr;
        PDEVICE_OBJECT          DeviceObject;
        PVOID                   MapedLocalConfigMmBaseAddr;
        PULONG                  DirectLocalConfigBaseAddr;
        UCHAR                   InterruptLine;
        
    // Adapter information
    //
	ULONG				ReadMapRegsGot;
	ULONG				WriteMapRegsGot;

	//
	// Device information
	//
	PDEVICE_OBJECT		FunctionalDeviceObject;
	PDEVICE_OBJECT		PhysicalDeviceObject;
	PDEVICE_OBJECT		DeviceToSendIrpsTo;

	//
	// Data structure elements for Read IRPs
	//
	KSPIN_LOCK			ReadQueueLock;
	LIST_ENTRY			ReadQueue;

	//
	// Pending READ information
	//
	PIRP				CurrentReadIrp;
	PHYSICAL_ADDRESS	ReadPaToDevice;
	ULONG				ReadLength;
	ULONG				ReadTotalLength;
	ULONG				MapRegsThisRead;
	ULONG				ReadSoFar;
	ULONG				ReadStartingOffset;
	PVOID				ReadMapRegBase;

	//
	// Data structure elements for Write IRPs
	//
	KSPIN_LOCK			WriteQueueLock;
	LIST_ENTRY			WriteQueue;

	//
	// Pending WRITE information
	//
	PIRP				CurrentWriteIrp;
	PHYSICAL_ADDRESS	        WritePaToDevice;
	ULONG				WriteLength;
	ULONG				WriteTotalLength;
	ULONG				MapRegsThisWrite;
	ULONG				WriteSoFar;
	ULONG				WriteStartingOffset;
	PVOID				WriteMapRegBase;

	//
	// Interrupt Object
	//
	PKINTERRUPT			InterruptObject;

	//
	// PCI Configuration infomration; once set at configuration time,
	// this information remains the same.
	//
	INTERFACE_TYPE		        InterfaceType;
	ULONG				BusType;
	
	
	ULONG				MapRegsGot;
	ULONG				InterruptLevel;
	ULONG				InterruptVector;
	ULONG				InterruptAffinity;
	KINTERRUPT_MODE  		InterruptMode;
	BOOLEAN				MappedPorts;

	//
	// PNP Events
	//
	KEVENT				StartEvent;
      KEVENT              StopEvent;
	KEVENT				RemoveEvent;

    //
    // Device State for PnP Purposes
    //
    ULONG               State;

	//
	// PNP Flags
	//
	BOOLEAN				Removed;
	BOOLEAN				Started;
	BOOLEAN				HoldNewRequests;

	// 
	// Power States
	//
	SYSTEM_POWER_STATE	SystemPowerState;
	DEVICE_POWER_STATE	DevicePowerState;

	//
	// Outstanding I/O counters
	//
	ULONG				OutstandingIO;

	//
	// Adapter's port base address
	//
	PULONG				PlxBaseRegisterAddress;

	//
	// COPY of Read and Write complete bits from INTCSR
	// in device.  ***NOTE: ACCESSED ONLY WHILE HOLDING
	// THIS DEVICE'S INTERRUPT SPIN LOCK***
	//
	ULONG				IntCsr;
    
} DEVICE_EXTENSION, *PDEVICE_EXTENSION;
// CMMAND CODE

// MASK CODE


// ioctl code 定义
// 设备类型 0-32767为微软公司保留,32768-65535可以使用
#define PCI9052_TYPE 	59856

// 自定义的IOCTL代码 
// 0-2047为微软公司保留， 2048-4095可以使用
#define PCI9052_READ_PORT_UCHAR \
    CTL_CODE( PCI9052_TYPE, 0x910, METHOD_BUFFERED, FILE_READ_ACCESS )

#define PCI9052_READ_PORT_USHORT \
    CTL_CODE( PCI9052_TYPE, 0x911, METHOD_BUFFERED, FILE_READ_ACCESS )

#define PCI9052_READ_PORT_ULONG \
    CTL_CODE( PCI9052_TYPE, 0x912, METHOD_BUFFERED, FILE_READ_ACCESS )

#define PCI9052_WRITE_PORT_UCHAR \
    CTL_CODE(PCI9052_TYPE,  0x920, METHOD_BUFFERED, FILE_WRITE_ACCESS)

#define PCI9052_WRITE_PORT_USHORT \
    CTL_CODE(PCI9052_TYPE,  0x921, METHOD_BUFFERED, FILE_WRITE_ACCESS)

#define PCI9052_WRITE_PORT_ULONG \
    CTL_CODE(PCI9052_TYPE,  0x922, METHOD_BUFFERED, FILE_WRITE_ACCESS)

#define PCI9052_READ_PCI_BUS_CONFIGURATION \
    CTL_CODE(PCI9052_TYPE,  0x930, METHOD_BUFFERED, FILE_WRITE_ACCESS)
    
#define PCI9052_DEVICE_DETECTION \
    CTL_CODE(PCI9052_TYPE,  0x931, METHOD_BUFFERED, FILE_WRITE_ACCESS)   

#define PCI9052_RCV_DATA \
    CTL_CODE(PCI9052_TYPE,  0x932, METHOD_BUFFERED, FILE_WRITE_ACCESS) 

#define PCI9052_XMIT_DATA \
    CTL_CODE(PCI9052_TYPE,  0x933, METHOD_BUFFERED, FILE_WRITE_ACCESS) 
    
#define PCI9052_START \
    CTL_CODE(PCI9052_TYPE,  0x934, METHOD_BUFFERED, FILE_WRITE_ACCESS) 

#define PCI9052_STOP \
    CTL_CODE(PCI9052_TYPE,  0x935, METHOD_BUFFERED, FILE_WRITE_ACCESS) 
        
// 用来向PCI9052的端口写数据
typedef struct  _PCI9052_WRITE_INPUT {
    ULONG   PortNumber;      
    union   {               
        ULONG   LongData;
        USHORT  ShortData;
        UCHAR   CharData;
    };
}   PCI9052_WRITE_INPUT;

NTSTATUS 
DriverEntry ( 
    IN PDRIVER_OBJECT DriverObject, 
    IN PUNICODE_STRING RegistryPath 
    );
    
NTSTATUS 
MainDispatch ( 
    IN PDEVICE_OBJECT DeviceObject, 
    IN PIRP Irp 
    );
   
VOID 
UnloadDriver ( 
    IN PDRIVER_OBJECT DriverObject 
    );
    
NTSTATUS 
Create9052(
    IN PDEVICE_OBJECT DeviceObject, 
    IN PIRP Irp
    );
    
NTSTATUS 
Close9052(
    IN PDEVICE_OBJECT DeviceObject, 
    IN PIRP Irp
    );

NTSTATUS 
Pnp9052(
    IN PDEVICE_OBJECT DeviceObject, 
    PIRP Irp
    );
    
NTSTATUS 
Read9052(
    IN PDEVICE_OBJECT DeviceObject, 
    PIRP Irp
    );

NTSTATUS 
Write9052(
    IN PDEVICE_OBJECT DeviceObject, 
    PIRP Irp
    );

NTSTATUS 
SystemControl(
    IN PDEVICE_OBJECT DeviceObject, 
    PIRP Irp
    );


NTSTATUS 
AddDevice(
    IN PDRIVER_OBJECT  DriverObject,
    IN PDEVICE_OBJECT  PhysicalDeviceObject
    );
     
NTSTATUS
Detect9052(
    IN PDEVICE_OBJECT DeviceObject
    );
BOOLEAN HandleInterrupt(
    PKINTERRUPT Interupt, 
    PVOID ServiceContext
    );
VOID DpcForIsr(
    PKDPC Dpc,
    PDEVICE_OBJECT DeviceObject,
    PIRP Irp,
    PVOID Context
    );

NTSTATUS AssignResource(
    IN PUNICODE_STRING  RegistryPath,
    IN PDRIVER_OBJECT  DriverObject,
    IN PDEVICE_OBJECT  DeviceObject
    );