📄 dispatch.c
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// Programmer:桂凯 西安电子科技大学
//
// email:wwwguikai@21cn.com
// All right reserved
#include <ntddk.h>
#include <ndis.h>
#include <pci9052hw.h>
#include <pci9052sw.h>
NTSTATUS
MainDispatch (
IN PDEVICE_OBJECT DeviceObject,
IN PIRP Irp
)
{
NTSTATUS status;
PIO_STACK_LOCATION irpSp;
PULONG dataptr;
PCI_COMMON_CONFIG pcidata;
BYTE result[256];
PULONG Register = NULL;
ULONG Value = 0;
PVOID MapedIoBaseAddr = NULL;
PHYSICAL_ADDRESS PhysicalAddress;
ULONG NumberOfBytes = 16;
MEMORY_CACHING_TYPE CacheEnable;
PDEVICE_EXTENSION deviceExt = (PDEVICE_EXTENSION)DeviceObject->DeviceExtension;
PULONG port = (PULONG)deviceExt->PlxRegisterBaseAddr + INTCSR;
ULONG value[1] ;
DbgPrint("deviceExt->PlxRegisterBaseAddr:0x %x\n",deviceExt->PlxRegisterBaseAddr);
UNREFERENCED_PARAMETER(DeviceObject);
irpSp=IoGetCurrentIrpStackLocation(Irp);
switch(irpSp->MajorFunction)
{
case IRP_MJ_READ:
status = Read9052(DeviceObject, Irp);
if( status != STATUS_SUCCESS)
{
KdPrint(("good bye"));
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
break;
}
break;
case IRP_MJ_CREATE:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
break;
case IRP_MJ_CLOSE:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
break;
case IRP_MJ_DEVICE_CONTROL: {
switch (irpSp->Parameters.DeviceIoControl.IoControlCode ) {
case PCI9052_READ_PCI_BUS_CONFIGURATION:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
if(irpSp->Parameters.DeviceIoControl.InputBufferLength!=8) break;
//this is the size of the PCI_COMMON_CONFIG structure
if(irpSp->Parameters.DeviceIoControl.OutputBufferLength!=256) break;
dataptr = (PULONG) Irp->AssociatedIrp.SystemBuffer;
Irp->IoStatus.Information=HalGetBusData(PCIConfiguration,dataptr[0],dataptr[1],&pcidata,sizeof(pcidata));
memcpy(dataptr,&pcidata,sizeof(pcidata));
break;
case PCI9052_READ_PORT_UCHAR:
break;
case PCI9052_READ_PORT_USHORT:
break;
case PCI9052_READ_PORT_ULONG:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
if(irpSp->Parameters.DeviceIoControl.InputBufferLength!=8) break;
if(irpSp->Parameters.DeviceIoControl.OutputBufferLength!=256) break;
dataptr = (PULONG) Irp->AssociatedIrp.SystemBuffer;
// *Register = dataptr[0];
// Value = dataptr[1];
deviceExt = (PDEVICE_EXTENSION)DeviceObject->DeviceExtension;
// if( deviceExt->BaseAddresses[1] != NULL)
WRITE_PORT_ULONG( &(deviceExt->BaseAddresses[1]), (ULONG)(*dataptr));
Irp->IoStatus.Information = 256;
break;
case PCI9052_WRITE_PORT_UCHAR:
break;
case PCI9052_WRITE_PORT_USHORT:
break;
case PCI9052_WRITE_PORT_ULONG:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
if(irpSp->Parameters.DeviceIoControl.InputBufferLength!=8) break;
if(irpSp->Parameters.DeviceIoControl.OutputBufferLength!=256) break;
dataptr = (PULONG) Irp->AssociatedIrp.SystemBuffer;
// *Register = dataptr[0];
// Value = dataptr[1];
deviceExt = (PDEVICE_EXTENSION)DeviceObject->DeviceExtension;
if( deviceExt->MapedIoLocalSpace0BaseAddr != NULL)
memcpy( deviceExt->MapedIoLocalSpace0BaseAddr, dataptr, 4);
Irp->IoStatus.Information = 256;
break;
case PCI9052_DEVICE_DETECTION:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
dataptr = (PULONG) Irp->AssociatedIrp.SystemBuffer;
status = Detect9052( DeviceObject);
if( status == STATUS_SUCCESS)
{
result[0] = 0x50;
result[1] = 0x90;
result[2] = 0xb5;
result[3] = 0x10;
}
if( status == STATUS_NO_SUCH_DEVICE)
{
result[0] = 0xff;
result[1] = 0xff;
result[2] = 0xff;
result[3] = 0xff;
}
Irp->IoStatus.Information = 256;
memcpy(dataptr,result,256);
break;
case PCI9052_XMIT_DATA:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
if(irpSp->Parameters.DeviceIoControl.InputBufferLength!=8) break;
if(irpSp->Parameters.DeviceIoControl.OutputBufferLength!=256) break;
dataptr = (PULONG) Irp->AssociatedIrp.SystemBuffer;
// *Register = dataptr[0];
// Value = dataptr[1];
deviceExt = (PDEVICE_EXTENSION)DeviceObject->DeviceExtension;
if( deviceExt->MapedIoLocalSpace0BaseAddr != NULL)
memcpy( deviceExt->MapedIoLocalSpace0BaseAddr, dataptr, 4);
Irp->IoStatus.Information = 256;
break;
case PCI9052_RCV_DATA:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 0L;
if(deviceExt->data_ready ==FALSE)
break;
else
dataptr = (PULONG) Irp->AssociatedIrp.SystemBuffer;
Irp->IoStatus.Information = 4;
deviceExt->data_ready =FALSE;
memcpy(dataptr, deviceExt->data,4);
break;
case PCI9052_START:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 1234L;
value[0]= 0x0143;
memcpy( port, value, 4);
break;
case PCI9052_STOP:
Irp->IoStatus.Status = STATUS_SUCCESS;
Irp->IoStatus.Information = 4321L;
value[0]= 0x0;
memcpy( port, value, 4);
break;
}// switch (irpSp->Parameters.DeviceIoControl.IoControlCode ) ENDED
break;
} // case IRP_MJ_DEVICE_CONTROL: ended
}
status=Irp->IoStatus.Status;
IoCompleteRequest(Irp, IO_NO_INCREMENT);
return(status);
}
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