at91irq_asm_handler.arm

ATMEL at91系列arm的官方驱动

    .type _tx_initialize_low_level,$function
    .size _tx_initialize_low_level,.-_tx_initialize_low_level


/**************************************************************************/ 
/*                                                                        */ 
/*  FUNCTION	: IRQ handlers                                            */ 
/*                                                                        */ 
/*  DESCRIPTION	: These functions are responsible for any low-level IRQ   */ 
/*    		  handing. They are working with the AT91's AIC. The AIC  */ 
/*    		  vectors must be set properly during the peripheral      */
/*		  initialization.                                         */
/*                                                                        */ 
/*  INPUT	: None                                                    */ 
/*                                                                        */ 
/*  OUTPUT	: None                                                    */ 
/*                                                                        */ 
/*  CALLS	: C IRQ handlers                                          */ 
/*                                                                        */ 
/*  CALLED	: None							  */
/*									  */
/**************************************************************************/ 

/* Timer interrupt handler.  */
    .globl  __tx_timer_handler
__tx_timer_handler:
    STMDB   sp!, {a1-a4}                    ; Save some scratch registers

    /* Save more context and then call system context save.  */
    MRS     a1, SPSR                        ; Pickup saved SPSR
    SUB     lr, lr, 4                       ; Adjust point of interrupt 
    STMDB   sp!, {a1, sl, ip, lr}           ; Store other registers
    BL      _tx_thread_context_save

    LDR     a2,=AIC_BASE                    ; Build address of AIC_EOICR register
    MOV     a3, TC0_IRQEN_BIT               ; Build timer0 clear value
    STR     a3, [a2, #AIC_EOICR]            ; Clear timer0 interrupt
    LDR     a2,=TC0_BASE                    ; Build address of timer0 status register
    LDR     a3, [a2, #TC_SR]                ; Read TC_SR to restart the timer
    BL      _tx_timer_interrupt             ; Timer interrupt handler

    /* Jump to context restore to restore system context.  */
    B       _tx_thread_context_restore

    .type __tx_timer_handler,$function
    .size __tx_timer_handler,.-__tx_timer_handler


/* USART0 interrupt handler.  */
     .globl  __at91_usart0_handler
__at91_usart0_handler:
    STMDB   sp!, {a1-a4}                    ; Save some scratch registers
    MRS     a1, SPSR                        ; Pickup saved SPSR
    SUB     lr, lr, 4                       ; Adjust point of interrupt 
    STMDB   sp!, {a1, sl, ip, lr}           ; Store other registers
    BL      _tx_thread_context_save

    LDR     a2,=AIC_BASE                    ; Build address of AIC_EOICR register
    STR     a2, [a2, #AIC_EOICR]            ; Clear usart0 interrupt
    ldr     r0, =terminal_1		    ; Point transfer
    bl      terminal_c_handler	    	    ; Call usart0 interrupt handler  

    /* Jump to context restore to restore system context.  */
    B       _tx_thread_context_restore

   .type __at91_usart0_handler,$function
   .size __at91_usart0_handler,.-__at91_usart0_handler


/* IRQ0 interrupt handler.  */
    .globl  __at91_irq0_handler
__at91_irq0_handler:
    STMDB   sp!, {a1-a4}                    ; Save some scratch registers
    MRS     a1, SPSR                        ; Pickup saved SPSR
    SUB     lr, lr, 4                       ; Adjust point of interrupt 
    STMDB   sp!, {a1, sl, ip, lr}           ; Store other registers
    BL      _tx_thread_context_save

    LDR     a2,=AIC_BASE                    ; Build address of AIC_EOICR register
    STR     a2, [a2, #AIC_EOICR]            ; Clear irq0 interrupt
    bl      irq0_c_handler		    ; Call irq0 interrupt handler   

    /* Jump to context restore to restore system context.  */
    B       _tx_thread_context_restore

   .type __at91_irq0_handler,$function
   .size __at91_irq0_handler,.-__at91_irq0_handler


/* Define shells for each of the interrupt vectors.  */
    .globl  __tx_undefined
__tx_undefined:
    B       __tx_undefined                  ; Undefined handler

    .type __tx_undefined,$function
    .size __tx_undefined,.-__tx_undefined

    .globl  __tx_swi_interrupt
__tx_swi_interrupt:
    B       __tx_swi_interrupt              ; Software interrupt handler

    .type __tx_swi_interrupt,$function
    .size __tx_swi_interrupt,.-__tx_swi_interrupt

    .globl  __tx_prefetch_handler
__tx_prefetch_handler:
    B       __tx_prefetch_handler           ; Prefetch exeception handler

    .type __tx_prefetch_handler,$function
    .size __tx_prefetch_handler,.-__tx_prefetch_handler

    .globl  __tx_abort_handler
__tx_abort_handler:
    B       __tx_abort_handler              ; Abort exception handler

    .type __tx_abort_handler,$function
    .size __tx_abort_handler,.-__tx_abort_handler

    .globl  __tx_reserved_handler
__tx_reserved_handler:
    B       __tx_reserved_handler           ; Reserved exception handler

    .type __tx_reserved_handler,$function
    .size __tx_reserved_handler,.-__tx_reserved_handler

   .globl  __tx_fiq_handler
__tx_fiq_handler:
    B       __tx_fiq_handler                ; FIQ interrupt handler

    .type __tx_fiq_handler,$function
    .size __tx_fiq_handler,.-__tx_fiq_handler


SYS_STACK_PTR:
    .data.w _tx_thread_system_stack_ptr
FIQ_STACK_SIZE:
    .data.w 512                             ; Keep 4-byte alignment
IRQ_STACK_SIZE:
    .data.w 1024                            ; Keep 4-byte alignment
TIM_STACK_SIZE:
    .data.w 1024                            ; Timer stack size
UNUSED_MEMORY:
    .data.w _tx_initialize_unused_memory
TIMER_STACK:
    .data.w _tx_timer_stack_start
TIMER_STACK_SIZE:
    .data.w _tx_timer_stack_size
TIMER_PRIORITY:
    .data.w _tx_timer_priority
FREE_MEMORY:
    .data.w __ghsbegin_free_mem
TIMER_HANDLER:
    .data.w __tx_timer_handler