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📄 main.lst

📁 硬件是8051f340+cp2200。插上网线
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 186          //
 187          //    where <ip-address> = the IP address of the embedded system
 188          //
 189          void get_data (PSOCKET_INFO socket_ptr)
 190          {
 191   1              // bit field_name_found;
 192   1        // unsigned char TEXT_COLOR;   
 193   1        
 194   1      //      byte data msg_buff[75];  
 195   1         // Search for the type field and store the result in <msg_buff1>.
 196   1         //status1 = mn_http_find_value (BODYptr, (byte*)"arg1", msg_buff1);
 197   1         // msg_buff1[]={ok};
 198   1         // Check status1 and status2 to determine if msg_buff1 and msg_buff2 are valid.
 199   1         //if(status1){
 200   1              //field_name_found = mn_http_find_value(BODYptr,(byte *)"type",msg_buff);
 201   1         //if(field_name_found){
 202   1            
 203   1            // Type Check #1 
 204   1            // Check if the requested data type is "Temperature"
 205   1           // if( toupper(msg_buff[0]) == 'T'){
 206   1               
 207   1               // Search the URL for field-name = "format" and copy field-value to <msg_buff>
 208   1            //        field_name_found = mn_http_find_value(BODYptr,(byte *)"format",msg_buff);         
 209   1               
 210   1               // Check if the requested format is HTML
 211   1            //   if(field_name_found && toupper(msg_buff[0]) == 'H'){
 212   1            // Build a web page in the HTML_BUFFER
 213   1                //int i;
 214   1            
 215   1               // for(i=0;i<10000;i++);
 216   1            //   msg_buff[0]++;
 217   1            sprintf(HTML_BUFFER, "<html><body bgcolor=blue text=yellow><center><span style=\"font-family: sans-s
             -erif; font-size: 28pt; font-weight: bold;\">%d.%d</span></center></body></html>",msg_buff[1],msg_buff[0]);     
 218   1            
 219   1            // Fill the socket with data to send.
 220   1            socket_ptr->send_ptr = HTML_BUFFER;
 221   1            socket_ptr->send_len = strlen(HTML_BUFFER);
 222   1      
 223   1        // }
 224   1        // }
 225   1        // }
 226   1      }
 227          
 228          
 229          //-----------------------------------------------------------------------------
 230          // Initialization Routines
 231          //-----------------------------------------------------------------------------
 232          
 233          //-----------------------------------------------------------------------------
 234          // PORT_Init
 235          //-----------------------------------------------------------------------------
 236          //
 237          // Configure the Interrupts, Crossbar and GPIO ports
 238          //
 239          void PORT_Init (void)
C51 COMPILER V8.02   MAIN                                                                  03/31/2008 20:06:45 PAGE 5   

 240          {
 241   1      
 242   1         IT01CF = 0x07;                      // Enable Interrupt 0 on P0.7
 243   1         TCON &= ~0x01;                      // Make /INT0 level triggered
 244   1      
 245   1         XBR0    = 0x01;                     // Enable UART on P0.4(TX) and P0.5(RX)
 246   1         XBR1    = 0x40;                     // Enable crossbar and enable
 247   1                                             // weak pull-ups
 248   1      
 249   1         P0MDOUT |= 0x40;                    // enable UTX as push-pull output
 250   1         P1MDOUT |= 0xC8;                    // /WR and /RD are push-pull
 251   1         P2MDOUT |= 0xFF;
 252   1         P3MDOUT |= 0xFF;
 253   1         P4MDOUT |= 0xFF;
 254   1      
 255   1      }
 256          //-----------------------------------------------------------------------------
 257          // EMIF_Init
 258          //-----------------------------------------------------------------------------
 259          //
 260          // Configure the External Memory Interface for both on and off-chip access.
 261          //
 262          void EMIF_Init (void)
 263          {
 264   1      
 265   1         EMI0CF = 0x0B;             // Multiplex mode
 266   1      
 267   1         EMI0TC = EMIF_TIMING;      // This constant may be modified
 268   1                                    // according to SYSCLK to meet the
 269   1                                    // timing requirements for the CP2200
 270   1      
 271   1         EMI0CN = BASE_ADDRESS;     // Page of XRAM accessed by EMIF
 272   1      
 273   1      }
 274          
 275          //-----------------------------------------------------------------------------
 276          // SYSCLK_Init
 277          //-----------------------------------------------------------------------------
 278          //
 279          // This routine initializes the system clock.
 280          //
 281          void SYSCLK_Init (void)
 282          {
 283   1         int i;
 284   1      
 285   1         OSCICN |= 0x03;                     // Configure internal oscillator for
 286   1                                             // its maximum frequency
 287   1        
 288   1         CLKMUL = 0x00;                      // Reset Clock Multiplier and select
 289   1                                             // internal oscillator as input source
 290   1      
 291   1         CLKMUL |= 0x80;                     // Enable the Clock Multiplier
 292   1      
 293   1         for(i = 0; i < 256; i++);           // Delay at least 5us
 294   1         
 295   1         CLKMUL |= 0xC0;                     // Initialize the Clock Multiplier
 296   1         
 297   1         while(!(CLKMUL & 0x20));            // Wait for MULRDY => 1
 298   1         
 299   1         RSTSRC = 0x06;                      // Enable missing clock detector
 300   1                                             // and VDD monitor
 301   1         
C51 COMPILER V8.02   MAIN                                                                  03/31/2008 20:06:45 PAGE 6   

 302   1         FLSCL |= 0x10;                      // Set Flash Scale for 48MHz
 303   1         
 304   1         CLKSEL |= 0x03;                     // Select output of clock multiplier
 305   1                                             // as the system clock.
 306   1      
 307   1      }
 308          //-----------------------------------------------------------------------------
 309          // Timer2_Init
 310          //-----------------------------------------------------------------------------
 311          //
 312          // This routine initializes Timer 2 to <T2_OVERFLOW_RATE> Hz.
 313          //
 314          void Timer2_Init(void)
 315          {
 316   1         TMR2CN  = 0x00;                     // Stop Timer2; Use SYSCLK/12 as timebase
 317   1         CKCON  &= ~0x60;                    // Timer2 clock based on T2XCLK;
 318   1      
 319   1         // Initialize Reload Value
 320   1         TMR2RL = -(SYSCLK/12/T2_OVERFLOW_RATE);
 321   1         TMR2 = TMR2RL;
 322   1      
 323   1         ET2 = 1;                            // Enable Timer 2 interrupts
 324   1         TR2 = 1;                            // Start Timer 2
 325   1      
 326   1      }
 327          //-----------------------------------------------------------------------------
 328          // ether_reset_low
 329          //-----------------------------------------------------------------------------
 330          //
 331          // This routine drives the reset pin of the ethernet controller low.
 332          //
 333          void ether_reset_low()
 334          {
 335   1      
 336   1         P0 &= ~0x40;               // Pull reset low
 337   1      
 338   1      }
 339          
 340          //-----------------------------------------------------------------------------
 341          // ether_reset_high
 342          //-----------------------------------------------------------------------------
 343          //
 344          // This routine places the reset pin in High-Z allowing it to be pulled up 
 345          // using the external pull-up resistor.
 346          //
 347          // Additionally, this routine waits for the reset pin to read high before
 348          // exiting.
 349          //
 350          void ether_reset_high (void)
 351          {
 352   1      
 353   1         P0 |= 0x40;               // Allow /RST to rise
 354   1         while(!(P0 & 0x40));      // Wait for /RST to go high
 355   1      
 356   1      
 357   1      }
 358          
 359          void add()
 360           { int i;
 361   1         for(i=0;i<10000;i++);
 362   1           msg_buff[0]++;
 363   1      }
C51 COMPILER V8.02   MAIN                                                                  03/31/2008 20:06:45 PAGE 7   



MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    531    ----
   CONSTANT SIZE    =    176    ----
   XDATA SIZE       =    410       3
   PDATA SIZE       =   ----    ----
   DATA SIZE        =   ----    ----
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)

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