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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"><html lang="en"><head><title>DscWatchdogEnable - Universal Driver Documentation</title><meta http-equiv="Content-type" content="text/html; charset=iso-8859-1"><meta name="robots" content="index,follow"><link rel="shortcut icon" href="/favicon.ico"><link rel="stylesheet" href="/dscud/style/wikiprintable.css"><script type="text/javascript" src="/dscud/style/wikibits.js"></script><style type='text/css'><!--a.new, #quickbar a.new { color: #CC2200; }#quickbar { position: absolute; top: 4px; left: 4px; border-right: 1px solid gray; }#article { margin-left: 152px; margin-right: 4px; }//--></style></head><body bgcolor='#FFFFFF'><div class='titlebox'><h1 class='pagetitle'>DscWatchdogEnable</h1><span class='subtitle'>Universal Driver Documentation</span></div><div class='navbox'><a href="manual_Main_Page.html" class='printable' title ="Main Page">Main Page</a> || <a href="manual_Table_of_Contents.html" class='printable' title ="Table of Contents">Table_of_Contents</a> || <a href="http://www.diamondsystems.com/">Diamond Systems Website</a></div></div><div class='bodytext'><a name="top"></a>This function loads the watchdog counters to the specified values and configures the general behavior of watchdog counter 1, and arms the watchdog timer circuit.
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<p><table border="0" id="toc"><tr><td align="center"><b>Table of contents</b> <script type='text/javascript'>showTocToggle("show","hide")</script></td></tr><tr id='tocinside'><td align="left"><div style="margin-bottom:0px;"><A CLASS="internal" HREF="#Function_Definition">1 Function Definition</A><BR></div><div style="margin-bottom:0px;"><A CLASS="internal" HREF="#Function_Parameters">2 Function Parameters</A><BR></div><div style="margin-bottom:0px;"><A CLASS="internal" HREF="#Return_Value">3 Return Value</A><BR></div><div style="margin-bottom:0px;"><A CLASS="internal" HREF="#Watchdog_Options">4 Watchdog Options</A><BR></div></td></tr></table><P><h2><a name="Function_Definition">Function Definition</a></h2>
BYTE dscWatchdogEnable(<a href="manual_DSCB.html" class='printable' title ="DSCB">DSCB</a> board, WORD wd1, BYTE wd2, SDWORD options);
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<h2><a name="Function_Parameters">Function Parameters</a></h2>
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<table border=1><tr ><TH>Name</TH><TH>Description</TH></tr><tr ><TD>board</TD><TD>The board handle</TD></tr><tr ><TD>wd1</TD><TD>Counter value for first watchdog timer</TD></tr><tr ><TD>wd2</TD><TD>Counter value for second watchdog timer</TD></tr><tr ><TD>options</TD><TD>A bitwise OR of watchdog options. See the list below.</TD></tr></table><p>
<h2><a name="Return_Value">Return Value</a></h2>
Error code or 0.
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<h2><a name="Watchdog_Options">Watchdog Options</a></h2>
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Each CPU has its own watchdog timer option. Below are the options for the different CPUs <br>
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Prometheus watchdog timer option
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<table border=1><tr ><TH>Name</TH><TH>Description</TH></tr><tr ><TD>PROM_WD_TRIGGER_SCI</TD><TD> 1 = Watchdog counter 1 will generate SCI on time-out<br>0 = No SCI occurs.</TD></tr><tr ><TD>PROM_WD_TRIGGER_NMI</TD><TD> 1 = Watchdog counter 1 will generate NMI on time-out<br>0 = No NMI occurs.</TD></tr><tr ><TD>PROM_WD_TRIGGER_SMI</TD><TD> 1 = Watchdog counter 1 will generate SMI on time-out<br>0 = No SMI occurs.</TD></tr><tr ><TD>PROM_WD_TRIGGER_RESET</TD><TD> 1 = Watchdog counter 1 will generate a hardware reset immediately on time-out. In this case WD2 serves no purpose, since its function is to delay the assertion of hardware reset from the timeout of WD1. However a valid load value for WD2 must still be supplied to the function.<br> 0 = no hardware reset occurs now. Hardware reset will still be generated upon timeout of WD2.
</TD></tr><tr ><TD>PROM_WD_WDI_ASSERT_FALLING_EDGE</TD><TD> 1 = WDI will retrigger the watchdog timer on a falling edge<br>0 = WDI will retrigger on a rising edge.</TD></tr><tr ><TD>PROM_WD_WDO_TRIGGERED_EARLY</TD><TD> 1 = output on WDO will be generated one clock cycle before counter 1 times out. In this case, WDO can be used to retrigger WDI by wiring the two signals together. This causes a bypass condition that prevents the watchdog timer from ever timing out.<br>0 = Output on WDO will be generated when watchdog counter 1 times out.</TD></tr><tr ><TD>PROM_WD_ENABLE_WDI_ASSERTION</TD><TD>1 = hardware trigger input WDI will retrigger watchdog timer circuit and reload counter 1. Software retrigger command may also be used.<br>0 = input signal WDI is disabled; only software retrigger command may be used.</TD></tr></table><p>
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<br><br><br>
Athena watchdog timer option
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<table border=1><tr ><TH>Name</TH><TH>Description</TH></tr><tr ><TD>ATHENA_WD_WDI_ASSERT_RISING_EDGE</TD><TD> 1 = Watchdog will retrigger on a rising edge<br>0 = retrigger on falling edge.</TD></tr><tr ><TD>ATHENA_WD_TRIGGER_SMI</TD><TD> 1 = Watchdog counter 1 will generate SMI on time-out<br>0 = No SMI occurs.</TD></tr><tr ><TD>ATHENA_WD_ENABLE_WDO</TD><TD> 1 = Send an external pulse on WDO before trigger<br>0 = No pulse before trigger.</TD></tr><tr ><TD>ATHENA_WD_ENABLED_WDI</TD><TD> 1 = Send an external pulse on WDI before trigger<br> 0 = No pulse before trigger.</TD></tr></table><p>
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<br><br><br>
Hercules watchdog timer option
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<table border=1><tr ><TH>Name</TH><TH>Description</TH></tr><tr ><TD>HERC_WD_TRIGGER_NMI</TD><TD> 1 = Watchdog counter 1 will generate NMI on time-out<br>0 = No NMI occurs.</TD></tr><tr ><TD>HERC_WD_TRIGGER_RESET</TD><TD> 1 = Watchdog counter WD1 will generate a hardware reset immediately on time-out. In this case WD2 serves no purpose, since its function is to delay the assertion of hardware reset from the timeout of WD1. However a valid load value for WD2 must still be supplied to the function.<br> 0 = no hardware reset occurs now. Hardware reset will still be generated upon timeout of WD2.
</TD></tr><tr ><TD>HERC_WD_WDI_ASSERT_FALLING_EDGE</TD><TD> 1 = WDI will retrigger the watchdog timer on a falling edge<br>0 = WDI will retrigger on a rising edge.</TD></tr><tr ><TD>HERC_WD_WDO_TRIGGERED_EARLY</TD><TD> 1 = output on WDO will be generated one clock cycle before counter 1 times out. In this case, WDO can be used to retrigger WDI by wiring the two signals together. This causes a bypass condition that prevents the watchdog timer from ever timing out.<br>0 = Output on WDO will be generated when watchdog counter 1 times out.</TD></tr><tr ><TD>HERC_WD_ENABLE_WDI_ASSERTION</TD><TD>1 = hardware trigger input WDI will retrigger watchdog timer circuit and reload counter 1. Software retrigger command may also be used.<br>0 = input signal WDI is disabled; only software retrigger command may be used.</TD></tr></table><p></div><p><em> <br> This page was last modified 23:12, 2 Aug 2005.<br>Copyright (c) 2004 Diamond Systems. All Rights Reserved.</em><!-- Time since request: 0.17 secs. --></body></html>⌨️ 快捷键说明
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