📄 dscud.h
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//////////////////////////////////////////////////////////////// */
/*/////////
// DSCCB //
//////// */
typedef struct
{
/*//////////////////////////////////////////////////////////
// These members are filled automatically by dscInitBoard //
// THE USER DOES NOT HAVE TO FILL THESE IN MANUALLY //
///////////////////////////////////////////////////////// */
BYTE boardtype; /* Contains the boardtype constant */
DSCB boardnum; /* The handle to the board */
/*///////////////////////////////////////////////////////////
// The user must fill in everything below that pertains to //
// board before the call to dscInitBoard //
////////////////////////////////////////////////////////// */
WORD base_address; /* Base address of the board */
/*////////////////////////////////////////////////////
// Use int_level for boards with only one interrupt //
/////////////////////////////////////////////////// */
BYTE int_level; /* Interrupt level of the board */
/*///////////////////////////////
// RMM416 and RMM1612 specific //
////////////////////////////// */
BOOL RMM_external_trigger; /* Enable/disable external trigger */
/*////////////////
// RMM specific //
/////////////// */
BOOL RMM_external_trigger_c3;
/*/////////////////
// EMM specific //
//////////////// */
WORD EMM_IOAddr[8]; /* IO addresses for up to eight ports */
WORD EMM_Interrupt[8]; /* Interrupts for up to eight ports */
/*/////////////////
// PROM specific //
//////////////// */
BYTE clkfrq0; /* 0 = 10Mhz, 1 = 1MHz */
BYTE clkfrq1; /* 0 = 10Mhz, 1 = 100KHz */
BYTE clksel1; /* 0 = internal oscillator, frequency set by ckfrq1. 1 = external clock input CLK1 */
/*////////////////
// RAW specific //
/////////////// */
WORD address_space; /* Size of I/O block (in bytes) to allocate. Only needed for DSC_RAW */
/*//////////////////////////////////////////////////////
// Obsolete Kept for backwards compatability only //
///////////////////////////////////////////////////// */
LONG clock_freq;
BYTE dma_level;
BYTE int_level1;
BYTE int_level2;
BYTE int_level3;
WORD fpga;
BYTE SMM_AD_resolution;
BOOL RMM_mode_16bit;
BOOL RMM_DAC_0_3_external_enable;
BOOL RMM_DAC_4_7_external_enable;
} DSCCB;
/*//////////
// DSCCBP //
///////// */
typedef struct
{
/*/////////////////////////////////////////////////////////////
// These members are filled automatically by dscPCIInitBoard //
// THE USER DOES NOT HAVE TO FILL THESE IN MANUALLY //
//////////////////////////////////////////////////////////// */
BYTE boardtype; /* Contains the boardtype constant */
DSCB boardnum; /* The handle to the board */
DWORD pci_mem_address; // Memory address if any assigned to board
/*///////////////////////////////////////////////////////////
// The user must fill in everything below that pertains to //
// board before the call to dscPCIInitBoard //
////////////////////////////////////////////////////////// */
BYTE pci_slot; // PCI slot jumper configured on the board
} DSCCBP;
/*/////////////////
// DSCADSETTINGS //
//////////////// */
typedef struct
{
BYTE current_channel; /* INPUT: Which channel to read AD samples from */
BYTE gain; /* INPUT: 0 = gain of 1, 1 = gain of 2, 2 = gain of 4, 3 = gain of 8 */
BYTE range; /* INPUT: 0 = 5V range, 1 = 10V range */
BYTE polarity; /* INPUT: 0 = bipolar, 1 = unipolar */
BYTE load_cal; /* INPUT: 0 = do not load calibration values, 1 = load */
BYTE scan_interval; /* For DMM32, Hercules, DMM48 only. Use constants SCAN_INTERVAL_X */
BYTE addiff; /* For HERCULES only, 0 = SINGLE_ENDED or 1 = DIFFERENTIAL */
} DSCADSETTINGS;
/*/////////////
// DSCADSCAN //
//////////// */
typedef struct
{
BYTE low_channel; /* INPUT: Low channel of the scan */
BYTE high_channel; /* INPUT: High channel of the scan */
DSCSAMPLE *sample_values; /* I/O: The user must point this to memory that has been allocated and ready to accept (high - low + 1) DSCADSAMPLE values into it */
BYTE gain; /* Obsolete */
} DSCADSCAN;
/*/////////////
// REGPARAMS //
//////////// */
/* This structure is for internal driver use */
typedef struct
{
DWORD address;
BYTE data;
} REGPARAMS;
/*/////////////
// ERRPARAMS //
//////////// */
typedef struct
{
BYTE ErrCode; /* OUTPUT: The numerical value of the last error */
char *errstring; /* OUTPUT: A string description of the last error */
} ERRPARAMS;
/*/////////////
// DSCAIOINT //
//////////// */
typedef struct
{
DWORD num_conversions; /* INPUT: total # of conversions to write to sample_values, unless cycling. */
FLOAT conversion_rate; /* INPUT: interrupts per second */
FLOAT conversion_rate_final;/* OUTPUT: the actual conversion rate programmed into the clock */
BOOL cycle; /* INPUT: when done with num_conversions, restart at the beginning of the buffer? */
BOOL internal_clock; /* INPUT: use the internal clock (82c54) ? */
BYTE low_channel; /* INPUT: lowest channel number to perform A/D conversion on */
BYTE high_channel; /* INPUT: highest channel number to perform A/D conversion on */
BOOL external_gate_enable; /* INPUT: A/D dmm, dmm-16 only */
BOOL internal_clock_gate; /* INPUT: Set internal gating on or off (refer to manual) */
DSCSAMPLE *sample_values; /* I/O: pointer to the user's sample buffer */
BOOL fifo_enab; /* INPUT: Fifo operation flag for int sample/scan modes. */
WORD fifo_depth; /* INPUT: Fifo depth (if fifo mode used) */
DWORD dump_threshold; /* INPUT: Threshold at which to dump the sample buffer */
BOOL channel_align; /* INPUT: if true, the interrupt will automatically realign the channels each cycle */
BYTE clksource; /* INPUT (PROM only): 0 for 100KHz, 1 for 10MHz internal clock source.*/
} DSCAIOINT;
/*//////////////////////////////
// DSCAUTOCAL, DSCADCALPARAMS //
///////////////////////////// */
typedef struct
{
BYTE adrange; /* INPUT: A/D Range to calibrate (use 0xFF for all ranges) */
BYTE boot_adrange; /* INPUT: When cal'ed, this adrange is stored to BOOT values */
FLOAT ad_offset, ad_gain; /* OUTPUT: Difference between target and measured vals. */
DFLOAT target_values[8]; /* OUTPUT: Target values read from EEPROM */
BOOL use_eeprom; /* Obsolete, but kept in for backwards compatibility */
/* To set the reference values, use dsc(S/G)etReferenceVoltages */
} DSCAUTOCAL, DSCADCALPARAMS;
/*////////////////
// SETCALPARAMS //
/////////////// */
/* This structure is here for backwards compatibility, but is no longer used */
typedef struct
{
BYTE chan;
BOOL cal_enable;
} SETCALPARAMS;
/*///////////
// DSCDACS //
////////// */
#define DACS_MAX_CHANNELS 16
typedef struct
{
BOOL channel_enable[DACS_MAX_CHANNELS]; /* INPUT: Which to update. channel_enable[x] = 1 means that output_codes[x] is valid */
DSCDACODE *output_codes; /* INPUT: A pointer to the user's array of DA codes */
} DSCDACS;
/*/////////////////
// DSCDASETTINGS //
//////////////// */
typedef struct
{
BYTE polarity; /* INPUT: 0 = BIPOLAR, 1 = UNIPOLAR */
BYTE load_cal; /* INPUT: 0 = FALSE, 1= TRUE. Loads calibration from eeprom */
FLOAT range; /* INPUT: Absolute value of maximum voltage */
} DSCDASETTINGS;
/*////////////
// DAPARAMS //
/////////// */
typedef struct
{
BYTE channel; /* INPUT: Which DA channel to modify */
DSCDACODE output_code; /* INPUT: The new output value for the DA channel */
} DAPARAMS;
/*//////////////////
// DSCDACALPARAMS //
///////////////// */
typedef struct
{
BOOL fixed; /* INPUT/OUTPUT: reports the "fixed" status that was detected. fixed=FALSE means programmable. */
BOOL polarity; /* INPUT/OUTPUT: Bipolar=FALSE, Unipolar=TRUE */
DFLOAT darange; /* INPUT: D/A programmable value to calibrate */
FLOAT offset; /* OUTPUT: Difference between target and measured vals. */
FLOAT gain; /* OUTPUT: Difference between target and measured vals. */
/*///////////////////////////
// For DMMAT specific use: //
////////////////////////// */
BOOL ch0pol, ch0prog, ch0ext; /* cho0pol=true: bipolar, ch0prog=true: programmable, ch0ext=true: external; */
BOOL ch1pol, ch1prog, ch1ext;
FLOAT ref;
} DSCDACALPARAMS; /* Single D/A channel */
/*////////
// DSCS //
/////// */
typedef struct
{
DWORD op_type; /* OUTPUT: reports the current operation type. Will usually be either OP_TYPE_NONE or OP_TYPE_INT */
DWORD transfers; /* OUTPUT: the number of A/D transfers the operation has performed in the current cycle */
DWORD total_transfers; /* OUTPUT: the total number of A/D transfers performed during every cycle */
DWORD da_transfers; /* OUTPUT: the number of D/A transfers the operation has performed in the current cycle */
DWORD da_total_transfers; /* OUTPUT: the total number of D/A transfers performed during every cycle */
DWORD overflows; /* OUTPUT: increments this value each time an overflow occurs */
/* The following are for backwards compatibility, not used anymore */
BYTE paused;
BYTE output;
WORD base_address;
BYTE int_level;
BOOL analog;
} DSCS;
/*//////////////////////
// DSCUSERINTFUNCTION //
///////////////////// */
typedef struct
{
DSCUserInterruptFunction func; /* INPUT: A pointer to the user's interrupt function */
BYTE int_mode; /* INPUT: Which user int mode to use */
DWORD int_type; /* INPUT: Which interrupt type to attach this function to (INT_TYPE_XXX) */
} DSCUSERINTFUNCTION;
/*//////////////
// DSCUSERINT //
///////////// */
/* These input values are board specific, please refer to the user's manual */
typedef struct
{
BYTE intsource;
BYTE counter;
BYTE clksource;
FLOAT rate;
DWORD int_type; /* OUTPUT: returns the "int_type" that this operation resulted in (INT_TYPE_XXX) */
DSCUserInterruptFunction func; /* OUTPUT: A pointer to the user's interrupt function */
} DSCUSERINT;
/*/////////
// DSCCS //
//////// */
typedef struct
{
DWORD value; /* OUTPUT: Counter readback value */
BYTE status; /* OUTPUT: Counter readback status */
} DSCCS;
/*/////////
// DSCCR //
//////// */
/* Used only in dscCounterRead, otherwise mostly for internal driver use */
typedef struct
{
BYTE control_code;
BYTE counter_number;
DWORD counter_data; /* Counter write data */
DSCCS counter0; /* Counter read data */
DSCCS counter1;
DSCCS counter2;
} DSCCR;
/*/////////////
// DSCDIOINT //
//////////// */
typedef struct
{
WORD num_transfers; /* INPUT: Number of conversions to perform */
BYTE port; /* INPUT: for boards w/ >8 bits of dio */
BYTE size; /* INPUT: 0-7 for bits 0-7, 8 for full byte, 16 for word */
BOOL cycle; /* INPUT: Set to TRUE to repeat the operation continuously */
BOOL internal_clock; /* INPUT: Set to TRUE to use the internal clock as a trigger, FALSE to use an external trigger */
BYTE mode; /* INPUT: for Garnet only */
BYTE source; /* INPUT: for Onyx only */
BYTE *digital_values; /* INPUT: The array that holds the DIO values to send */
DWORD dump_threshold; /* INPUT: Threshold at which to dump the sample buffer */
} DSCDIOINT;
/*/////////////
// DSCEMMDIO // this structure is for use with the EMMDIO function dscEMMDIO[G/S]etState
//////////// */
typedef struct
{
BYTE DIOpins[6]; /* EMMDIO I/O: contains values to write to pins, or values read from pins - based on use_DIOpins */
BOOL lock_port[6]; /* EMMDIO INPUT: values for the lock bits at base+7 */
BYTE edge_polarity[4]; /* EMMDIO OUTPUT: contains the polarity to each pin on ports 0-2 (each BYTE is one port w/ 8 pins) 0=negative, 1=positive */
BYTE edge_detect[4]; /* EMMDIO INPUT: set edge detection enabled (1) or disabled (0) for the 8 pins on each port 0-2 */
BYTE edge_detect_int[4]; /* EMMDIO OUTPUT: read-only: specifies if an edge was detected on the pin since its port was last cleared */
BYTE edge_detect_clear[3]; /* EMMDIO INPUT: set to 1 for ech port 0-2 to clear the edge detection values */
BOOL use_DIOpins; /* EMMDIO INPUT: 0 = ignore DIOpins, 1 = use DIOpins */
BOOL use_lock_port; /* EMMDIO INPUT: 0 = ignore lock_port, 1 = use lock_port */
BOOL use_edge_polarity; /* EMMDIO INPUT: 0 = ignore edge_polarity, 1 = use edge_polarity */
BOOL use_edge_detect; /* EMMDIO INPUT: 0 = ignore edge_detect, 1 = use edge_detect */
BYTE interrupt_status; /* EMMDIO OUTPUT: read-only: corresponds to base+6, bits 0-2 are interrupt status for port 0-2 */
} DSCEMMDIO;
/*/////////////////
// DSCOPTOSTATE // this structure is used for the dscOptoGetState/SetState
//////////////// */
#define DSCUD_MAX_OPTO 8 /* The maximum number of optos that can be reported by the above functions */
typedef struct
{
BYTE edge_polarity[DSCUD_MAX_OPTO]; /* READ/WRITE: contains the polarity to each pin, opto 0-3 (each opto has a programmable edge) 0=falling, 1=rising */
BYTE edge_detect_enab[DSCUD_MAX_OPTO]; /* READ/WRITE: set edge detection enabled (1) or disabled (0) for 4 pins, opto 0-3 */
BYTE edge_status[DSCUD_MAX_OPTO]; /* READ: read-only, specifies if an edge was detected on the pin, opto 0-3 */
BYTE oint_state[DSCUD_MAX_OPTO]; /* READ: read-only, the state of each opto */
BYTE dmm48at_oint_state; /* READ: this reports the state of the opto register, base+7, on the DMM48 when the last opto interrupt occured. Only valid when opto interrupts are enabled.
For DMM48 this variable replaces the edge_status array */
} DSCOPTOSTATE;
/*/////////////////////
// DSCEMMDIORESETINT //
//////////////////// */
typedef struct
{
BOOL use_lock_port; /* INPUT: 0 = ignore lock_port, 1 = use lock_port */
BOOL lock_port[6]; /* INPUT: values for the lock bits at base+7 */
BYTE edge_detect_clear[3]; /* INPUT: set to 1 for ech port 0-2 to clear the edge detection values */
} DSCEMMDIORESETINT;
/*///////////////
// DSCWATCHDOG //
////////////// */
typedef struct
{
WORD wd1; /* INPUT: WD1 16-bit timer value (runs at ~32KHz - max 2 seconds) */
BYTE wd2; /* INPUT: WD2 8-bit timer value (runs at ~32KHz - max 7.2ms) */
BYTE options; /* INPUT: option mask (e.g. "PROM_WD_TRIGGER_SMI | PROM_WD_TRIGGER_NMI")
or "HERC_WD_TRIGGER_SMI | HERC_WD_TRIGGER_NMI"*/
} DSCWATCHDOG;
/*////////////
// DSCPWM //
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