hwinit.c

Microsoft WinCE 6.0 BSP FINAL release source code for use with the i.MX27ADS TO2 WCE600_FINAL_MX27_S

}
#endif
//-----------------------------------------------------------------------------
//
//  Function: InitializeCPLD
//
//  This function is to configure the CPLD to corresponding USB core
//
//  Parameters:
//     IsHost - TRUE: it is configured as USB Host
//            - FALSE: it is configured as USB client
//     
//  Returns:
//     TRUE: Success
//     FALSE: Failure
//
//-----------------------------------------------------------------------------
static BOOL InitializeCPLD(BOOL IsHost)
{
    volatile PCSP_PBC_REGS  cpld;
    PHYSICAL_ADDRESS phyAddr;

    phyAddr.QuadPart = BSP_BASE_REG_PA_PBC_BASE;
    cpld = (PCSP_PBC_REGS) MmMapIoSpace(phyAddr, sizeof(CSP_PBC_REGS), FALSE);
    if (cpld == NULL)
    {
        RETAILMSG(1,
                (TEXT("%s(): MmMapIoSpace failed!\r\n"), __WFUNCTION__));
        return FALSE;
    }       

	//enble OTG
	OUTREG16(&cpld->BCTRL3_SET,(1<<PBC_BCTRL3_USB_OTG_ON_LSH));

    OUTREG16(&cpld->BCTRL3_SET,(1<<PBC_BCTRL3_OTG_HS_EN_LSH)); 
    if (IsHost)
        OUTREG16(&cpld->BCTRL3_CLEAR,(1<<PBC_BCTRL3_OTG_VBUS_EN_LSH)); 

    OUTREG16(&cpld->BCTRL3_CLEAR,(1<<PBC_BCTRL3_OTG_HS_EN_LSH)); 
    
    MmUnmapIoSpace(cpld, sizeof(CSP_PBC_REGS));
    return TRUE;
}

//-----------------------------------------------------------------------------
//
//  Function: DumpDeviceState
//
//  This function is to dump the device status
//
//  Parameters:
//     state - pointer to PORTSC register
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
#ifdef DEBUG
static void DumpDeviceState( USB_PORTSC_T * state)  
{
    if (state->CCS)
        RETAILMSG(1, (L"\t\tCurrent Connect Status: Attached\r\n"));
    if (state->CSC)
        RETAILMSG(1, (L"\t\tConnect Status Change: Changed\r\n"));
    if (state->PE)
        RETAILMSG(1, (L"\t\tPort Enabled\r\n"));
    if (state->PEC)
        RETAILMSG(1, (L"\t\tPort Enable/Disable Change\r\n"));
    if (state->OCA)
        RETAILMSG(1, (L"\t\tOver-current Active\r\n"));
    if (state->OCC)
        RETAILMSG(1, (L"\t\tOver-current Change\r\n"));
    if (state->FPR)
        RETAILMSG(1, (L"\t\tForce Port Resume\r\n"));
    if (state->SUSP)
        RETAILMSG(1, (L"\t\tSuspend\r\n"));
    if (state->PR)
        RETAILMSG(1, (L"\t\tPort Reset\r\n"));
    if (state->HSP)
        RETAILMSG(1, (L"\t\tHigh-Speed Port \r\n"));
    
    RETAILMSG(1, (L"\t\tLine Status: %x", state->LS));
    switch (state->LS) {
        case 0:
            RETAILMSG(1, (L"\t\t\tSE0\r\n"));
            break;
        case 1:
            RETAILMSG(1, (L"\t\t\tJ-state\r\n"));
            break;
        case 2:
            RETAILMSG(1, (L"\t\t\tK-state\r\n"));
            break;
        case 3: 
        default:
            RETAILMSG(1, (L"\t\t\tUndefined\r\n"));
            break;
    }

    if (state->PP)
        RETAILMSG(1, (L"\t\t??? Should be 0 for device\r\n"));
    if (state->PO)
        RETAILMSG(1, (L"\t\tPort Owner\r\n"));
    if (state->PIC) {
        RETAILMSG(1, (L"\t\tPort Indicator Control"));
        switch (state->PIC) {
            case 1:
                RETAILMSG(1, (L"\t\t\tAmber\r\n"));
                break;
            case 2:
                RETAILMSG(1, (L"\t\t\tGreen\r\n"));
                break;
            case 3:
            default:
                RETAILMSG(1, (L"\t\t\tUndefined\r\n"));
                break;
        }
    }   
    if (state->PTC) 
        RETAILMSG(1, (L"\t\tPort Test Control: %x\r\n", state->PTC));
        
    if (state->WKCN) 
        RETAILMSG(1, (L"\t\tWake on Connect Enable (WKCNNT_E)\r\n"));
                        
    if (state->WKDC) 
        RETAILMSG(1, (L"\t\tWake on Disconnect Enable (WKDSCNNT_E) \r\n"));

    if (state->WKOC) 
        RETAILMSG(1, (L"\t\tWake on Over-current Enable (WKOC_E) \r\n"));
    
    if (state->PHCD) 
        RETAILMSG(1, (L"\t\tPHY Low Power Suspend - Clock Disable (PLPSCD) \r\n"));

    if (state->PFSC) 
        RETAILMSG(1, (L"\t\tPort Force Full Speed Connect \r\n"));

    RETAILMSG(1, (L"\t\tPort Speed: %x->", state->PSPD));
    switch (state->PSPD) {
        case 0:
            RETAILMSG(1, (L"\t\t\tFull Speed\r\n"));
            break;
        case 1:
            RETAILMSG(1, (L"\t\t\tLow Speed\r\n"));
            break;
        case 2:
            RETAILMSG(1, (L"\t\t\tHigh Speed\r\n"));
            break;
        case 3:
        default:
            RETAILMSG(1, (L"\t\t\tUndefined\r\n"));
            break;
    }
    RETAILMSG(1, (L"\t\tParallel Transceiver Width:%x->", state->PTW));
    if (state->PTW) 
        RETAILMSG(1, (L"\t\t\t16 bits\r\n"));
    else
        RETAILMSG(1, (L"\t\t\t8 bits\r\n"));
    if (state->STS) 
        RETAILMSG(1, (L"\t\tSerial Transceiver Select \r\n"));
    
    RETAILMSG(1, (L"\t\tParallel Transceiver Select:%x->", state->PTS));
    switch (state->PTS) {
        case 0:
            RETAILMSG(1, (L"\t\t\tUTMI/UTMI+\r\n"));
            break;
        case 1:
            RETAILMSG(1, (L"\t\t\tPhilips Classic\r\n"));
            break;
        case 2:
            RETAILMSG(1, (L"\t\t\tULPI\r\n"));
            break;
        case 3:
            RETAILMSG(1, (L"\t\t\tSerial/1.1 PHY (FS Only)\r\n"));
            break;
        default:
            RETAILMSG(1, (L"\t\t\tUndefined\r\n"));
            break;
    }                   
}
#endif

//-----------------------------------------------------------------------------
//
//  Function: DumpUSBRegs
//
//  This function is to dump the USB OTG Register detail
//
//  Parameters:
//     regs - Pointer to 3 USB Core Register
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------
#ifdef DEBUG
void DumpUSBRegs(PCSP_USB_REGS regs)
{
    static first=1;
    CSP_USB_REG *pReg;
    
    RETAILMSG(1, (L"Dump OTG Regs\r\n"));
    pReg=(PCSP_USB_REG)(&(regs->OTG));

    if (first) {
        RETAILMSG(1,(L"\tID(%xh)=%x\r\n",offset(CSP_USB_REG,ID), INREG32(&pReg->ID)));
        RETAILMSG(1,(L"\tHWGENERAL(%xh)=%x\r\n",offset(CSP_USB_REG,HWGENERAL),INREG32(&pReg->HWGENERAL)));
        RETAILMSG(1,(L"\tHWHOST(%xh)=%x\r\n",offset(CSP_USB_REG,HWHOST),INREG32(&pReg->HWHOST)));
        RETAILMSG(1,(L"\tHWDEVICE(%xh)=%x\r\n",offset(CSP_USB_REG,HWDEVICE),INREG32(&pReg->HWDEVICE)));
        RETAILMSG(1,(L"\tHWTXBUF(%xh)=%x\r\n",offset(CSP_USB_REG,HWTXBUF),INREG32(&pReg->HWTXBUF)));
        RETAILMSG(1,(L"\tHWRXBUF(%xh)=%x\r\n",offset(CSP_USB_REG,HWRXBUF),INREG32(&pReg->HWRXBUF)));
        RETAILMSG(1,(L"\tCAPLENGTH(%xh)=%x\r\n",offset(CSP_USB_REG,CAPLENGTH),INREG8(&pReg->CAPLENGTH)));
        RETAILMSG(1,(L"\tHCIVERSION(%xh)=%x\r\n",offset(CSP_USB_REG,HCIVERSION),INREG16(&pReg->HCIVERSION)));
        RETAILMSG(1,(L"\tHCSPARAMS(%xh)=%x\r\n",offset(CSP_USB_REG,HCSPARAMS),INREG32(&pReg->HCSPARAMS)));
        RETAILMSG(1,(L"\tHCCPARAMS(%xh)=%x\r\n",offset(CSP_USB_REG,HCCPARAMS),INREG32(&pReg->HCCPARAMS)));
        RETAILMSG(1,(L"\tDCIVERSION(%xh)=%x\r\n",offset(CSP_USB_REG,DCIVERSION),INREG16(&pReg->DCIVERSION)));
        RETAILMSG(1,(L"\tDCCPARAMS(%xh)=%x\r\n",offset(CSP_USB_REG,DCCPARAMS),INREG32(&pReg->DCCPARAMS)));
        first=0;
    }   
    RETAILMSG(1,(L"\tUSBCMD(%xh)=%x\r\n",offset(CSP_USB_REG,USBCMD),INREG32(&pReg->USBCMD)));
    RETAILMSG(1,(L"\tUSBSTS(%xh)=%x\r\n",offset(CSP_USB_REG,USBSTS),INREG32(&pReg->USBSTS)));
    RETAILMSG(1,(L"\tUSBINTR(%xh)=%x\r\n",offset(CSP_USB_REG,USBINTR),INREG32(&pReg->USBINTR)));
    RETAILMSG(1,(L"\tPORTSC(%xh)[0]=%x\r\n",offset(CSP_USB_REG,PORTSC[0]),INREG32(&pReg->PORTSC[0])));
    {
        USB_PORTSC_T state;
        DWORD * temp=(DWORD*)&state;
        *temp=INREG32(&pReg->PORTSC[0]);
        DumpDeviceState( & state);
    }
    RETAILMSG(1,(L"\tOTGSC(%xh)=%x\r\n",offset(CSP_USB_REG,OTGSC),INREG32(&pReg->OTGSC)));
    RETAILMSG(1,(L"\tUSBMODE(%xh)=%x\r\n",offset(CSP_USB_REG,USBMODE),INREG32(&pReg->USBMODE)));
    RETAILMSG(1,(L"\tULPI_VIEWPORT(%xh)=%x\r\n",offset(CSP_USB_REG,ULPI_VIEWPORT),INREG32(&pReg->ULPI_VIEWPORT)));

    RETAILMSG(1,(L"\t*********************\r\n"));
    RETAILMSG(1,(L"\tAddress of ASYNCLISTADDR at 0x%x\r\n", &pReg->T_158H.ASYNCLISTADDR));
    RETAILMSG(1,(L"\tASYNCLISTADDR(%xh)=%x\r\n",offset(CSP_USB_REG,T_158H),INREG32(&pReg->T_158H.ASYNCLISTADDR)));
    RETAILMSG(1,(L"\tENDPTSETUPSTAT(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTSETUPSTAT),INREG32(&pReg->ENDPTSETUPSTAT)));
    RETAILMSG(1,(L"\tENDPTPRIME(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTPRIME),INREG32(&pReg->ENDPTPRIME)));
    RETAILMSG(1,(L"\tENDPTFLUSH(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTFLUSH),INREG32(&pReg->ENDPTFLUSH)));
    RETAILMSG(1,(L"\tENDPTSTATUS(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTSTATUS),INREG32(&pReg->ENDPTSTATUS)));
    RETAILMSG(1,(L"\tENDPTCOMPLETE(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTCOMPLETE),INREG32(&pReg->ENDPTCOMPLETE)));
    RETAILMSG(1,(L"\tENDPTCTRL0(%xh)=%x\r\n",offset(CSP_USB_REG,ENDPTCTRL0),INREG32(&pReg->ENDPTCTRL0)));
    RETAILMSG(1,(L"\t*********************\r\n"));
    
    RETAILMSG(1,(L"\tUSB_CTRL(%xh)=%x\r\n",offset(CSP_USB_REGS,USB_CTRL),INREG32(&regs->USB_CTRL)));
    RETAILMSG(1,(L"\tUSB_OTG_MIRROR(%xh)=%x\r\n",offset(CSP_USB_REGS,USB_OTG_MIRROR),INREG32(&regs->USB_OTG_MIRROR)));

}
#endif
//-----------------------------------------------------------------------------
//
//  Function: ConfigOTGHost
//
//  This function is to configure host functionality on the USB OTG Core.
//
//  Parameters:
//     pRegs - Pointer to 3 USB Core Registers
//     
//  Returns:
//     NULL
//
//-----------------------------------------------------------------------------

static void ConfigOTGHost(CSP_USB_REGS *pRegs)
{
    USB_PORTSC_T Portsc;
    USB_CTRL_T   Ctrl;
    DWORD *temp;            

    //RETAILMSG(1, (TEXT("ConfigOTGHost\r\n")));
    //usb_otg_ulpi_interface_configure
    temp  = (DWORD *)&Portsc;
    *temp = INREG32(&pRegs->OTG.PORTSC);
    Portsc.LS  = LS_J_STATE;
    Portsc.PTS = PTS_ULPI;
    OUTREG32(&pRegs->OTG.PORTSC, *temp);

    // usb_ulpi_interrupt_enable
    temp  = (DWORD *)&Ctrl;
    *temp = INREG32(&pRegs->USB_CTRL);
    Ctrl.OUIE = OUIE_INT_WAKE_ENABLE;
    OUTREG32(&pRegs->USB_CTRL, *temp);

    // usb_otg_interrupt_enable
    temp = (DWORD *)&Ctrl;
    *temp = INREG32(&pRegs->USB_CTRL);
    Ctrl.OWIE = OWIE_INT_ENABLE;
    OUTREG32(&pRegs->USB_CTRL, *temp);

    // usb_otg_power_mask_enable
    temp = (DWORD *)&Ctrl;
    *temp = INREG32(&pRegs->USB_CTRL);
    Ctrl.OPM = OPM_NO_USBPWR;
    OUTREG32(&pRegs->USB_CTRL, *temp);

    // usb_bypass_inactive
    temp = (DWORD *)&Ctrl;  
    *temp=0;
    Ctrl.BPE = BPE_BYPASS_INACTIVE;     //  Bypass Enable bit, clear it
    CLRREG32(&pRegs->USB_CTRL, *temp);

    // otg_setmode
	Reset(pRegs);
	SetMode(pRegs,CM_HOST_CONTROLLER);

    // otg_power_on_port1
    if (INREG32(&pRegs->OTG.HCSPARAMS) &(0x1 << PPC_LSH))
    {
        DWORD Mask = (0x1<<1) + (0x1<<3)+(0x1<<5);
        CLRREG32(&pRegs->OTG.PORTSC, Mask);
        temp = (DWORD *)&Portsc;
        *temp = INREG32(&pRegs->OTG.PORTSC);
        Portsc.PP = PP_READ_WRITE;      
        OUTREG32(&pRegs->OTG.PORTSC, *temp);
    }
    else
        RETAILMSG(1, (TEXT("Host does not control power\r\n")));

    //otg_controller_reset
	Reset(pRegs);
	SetMode(pRegs,CM_HOST_CONTROLLER);    
}

//-----------------------------------------------------------------------------
//