fs453.h

Microsoft WinCE 6.0 BSP FINAL release source code for use with the i.MX27ADS TO2 WCE600_FINAL_MX27_S

#define FS453_MISC_8D_NOTCH_WD_WID              1
#define FS453_MISC_8D_NOTCH_FREQ_WID            3
//0x92
#define FS453_VID_CNTL0_TOP_FIELD_WID           1
#define FS453_VID_CNTL0_OBIN_USIG_WID           1
#define FS453_VID_CNTL0_PRPB_SYNC_WID           1
#define FS453_VID_CNTL0_VSYNC5_6_WID            1
#define FS453_VID_CNTL0_BLANK_INV_WID           1
#define FS453_VID_CNTL0_FIELD_INV_WID           1
#define FS453_VID_CNTL0_VSYNC_INV_WID           1
#define FS453_VID_CNTL0_HSYNC_INV_WID           1
#define FS453_VID_CNTL0_INT_PROG_WID            1
#define FS453_VID_CNTL0_FIELD_MS_WID            1
#define FS453_VID_CNTL0_SYNC_LVL_WID            1
#define FS453_VID_CNTL0_SYNC_BI_TRI_WID         1
#define FS453_VID_CNTL0_SYNC_ADD_WID            1
#define FS453_VID_CNTL0_MATRIX_BYP_WID          1
#define FS453_VID_CNTL0_VID_MODE_WID            2
//0x94 
#define FS453_HD_FP_SYNC_FP_WID_WID             8
#define FS453_HD_FP_SYNC_HSYNC_WID_WID          8
//0x96 
#define FS453_HD_YOFF_BP_Y_OFF_WID              8
#define FS453_HD_YOFF_BP_HBP_WID_WID            8
//0x98 
#define FS453_SYNC_DL_SYNC_DL_WID               16
//0x9A 
#define FS453_FLD_DLY_FLD_INV_WID               1
#define FS453_FLD_DLY_FLD_TOG_WID               1
#define FS453_FLD_DLY_FLD_DLY_WID               11
//0x9C 
#define FS453_LD_DET_DET_RDY_WID                1
#define FS453_LD_DET_LD_MSK_WID                 4
#define FS453_LD_DET_LD_VAL_WID                 10
//0x9E
#define FS453_DAC_CNTL_DAC_DMUX_WID             2
#define FS453_DAC_CNTL_DAC_CMUX_WID             2
#define FS453_DAC_CNTL_DAC_BMUX_WID             2
#define FS453_DAC_CNTL_DAC_AMUX_WID             2
//0xa0
#define FS453_PWR_MGNT_GTLIO_PD_WID             1
#define FS453_PWR_MGNT_PLL_PD_WID               1
#define FS453_PWR_MGNT_CLKOFF_WID               1
#define FS453_PWR_MGNT_CLK_SOFF_WID             2
#define FS453_PWR_MGNT_DAC_D_LP_WID             1
#define FS453_PWR_MGNT_DAC_C_LP_WID             1
#define FS453_PWR_MGNT_DAC_B_LP_WID             1
#define FS453_PWR_MGNT_DAC_A_LP_WID             1
#define FS453_PWR_MGNT_BGAP_OFF_WID             1
#define FS453_PWR_MGNT_DAC_D_OFF_WID            1
#define FS453_PWR_MGNT_DAC_C_OFF_WID            1
#define FS453_PWR_MGNT_DAC_B_OFF_WID            1
#define FS453_PWR_MGNT_DAC_A_OFF_WID            1
//0xA2 
#define FS453_RED_MTX_RED_MTX_WID               8
//0xA4 
#define FS453_GRN_MTX_GRN_MTX_WID               8
//0xA6 
#define FS453_BLU_MTX_BLU_MTX_WID               8
//0xA8 
#define FS453_RED_SCL_RED_SCL_WID               9
//0xAA 
#define FS453_GRN_SCL_GRN_SCL_WID               9
//0xAC 
#define FS453_BLU_SCL_BLU_SCL_WID               9
//0xAE 
#define FS453_CC_F1_CC_F1_WID                   16
//0xB0 
#define FS453_CC_F2_CC_F2_WID                   16
//0xB2 
#define FS453_CC_CNTL_CC_EN_F2_WID              1
#define FS453_CC_CNTL_CC_EN_F1_WID              1
#define FS453_CC_CNTL_EPARITY_WID               1
#define FS453_CC_CNTL_F2_LOS_WID                6
#define FS453_CC_CNTL_F1_LOS_WID                6
//0xB4 
#define FS453_CC_BLNK_RGB_BLNK_WID              8
#define FS453_CC_BLNK_YC_BLNK_WID               8
//0xB6 
#define FS453_CC_BKS_CC_BKS_WID                 10
//0xB8 
#define FS453_HACT_ST_HACT_ST_WID               12
//0xBA 
#define FS453_HACT_WD_HACT_WD_WID               12
//0xBC 
#define FS453_VACT_ST_VACT_ST_WID               12
//0xBE 
#define FS453_VACT_HT_VACT_HT_WID               12
//0xC0 
#define FS453_PR_PB_SC_PB_SC_WID                8
#define FS453_PR_PB_SC_PR_SC_WID                8
//0xC2 
#define FS453_Y_BW_Y_BW_WID                     8
//0xc4
#define FS453_QPR_INITIATE_WID                  4
#define FS453_QPR_QK_UIM_WID                    2
#define FS453_QPR_QK_OS_WID                     2
#define FS453_QPR_QK_YC_IN_WID                  1
#define FS453_QPR_QK_FF_WID                     1
#define FS453_QPR_QK_OM_WID                     2
#define FS453_QPR_QK_UO_WID                     1
#define FS453_QPR_QK_GMODE_WID                  2
#define FS453_QPR_QK_PN_WID                     1

//------------------------------------------------------------------------------
// REGISTER BIT WRITE VALUES
//------------------------------------------------------------------------------
#define FS453_SET_ENABLE                        1
#define FS453_SET_DISABLE                       0

//0x0a
#define FS453_BYPASS_B_BYPASS_HD_MODE           1

//0x0C
#define FS453_CR_GCC_CK_LVL_LOW_VOL             1
#define FS453_CR_GCC_CK_LVL_OPENDRAIN           0
#define FS453_CR_P656_LVL_LVTTL                 1
#define FS453_CR_P656_LVL_OPENDRAIN             0

//0x0E
#define FS453_MISC_UIM_MOD_M888D                0
#define FS453_MISC_UIM_MOD_M888I                1
#define FS453_MISC_UIM_MOD_M565I                1
#define FS453_MISC_UIM_MOD_M555                 2
#define FS453_MISC_UIM_MOD_N888                 3
#define FS453_MISC_UIM_MOD_N666                 3
#define FS453_MISC_UIM_MOD_N565                 3
#define FS453_MISC_UIM_MOD_M444C                4
#define FS453_MISC_UIM_MOD_M444T1               5
#define FS453_MISC_UIM_MOD_M565T2               6
#define FS453_MISC_UIM_MOD_M422                 7
#define FS453_MISC_UIM_MOD_N656                 8
#define FS453_MISC_UIM_MOD_N601                 9
#define FS453_MISC_UIM_MOD_N444                 10

//0x47
#define FS453_MISC_47_COMP_YUV_RGB_OUTPUT       0
#define FS453_MISC_47_COMP_YUV_YUV_OUTPUT       1
#define FS453_MISC_47_COMP_GAIN_100             0
#define FS453_MISC_47_COMP_GAIN_25              1
#define FS453_MISC_47_COMP_GAIN_50              2
#define FS453_MISC_47_COMP_GAIN_75              3

//0x47,0x8d
#define FS453_FILTER_BANDWIDTH_NARROW           0
#define FS453_FILTER_BANDWIDTH_WIDE             1
#define FS453_FILTER_BANDWIDTH_EXTRA_WIDE       2
#define FS453_FILTER_BANDWIDTH_ULTRA_WIDE       3

//0x74
#define FS453_MISC_74_CH_PH_R_EVERY_8_FIELDS    0
#define FS453_MISC_74_CH_PH_R_EVERY_4_FIELDS    1
#define FS453_MISC_74_CH_PH_R_EVERY_OTHER_LINES 2
#define FS453_MISC_74_CH_PH_R_ONCE              3

//0x92
#define FS453_VID_CNTL0_TOP_FIELD_IS_LINE1      0
#define FS453_VID_CNTL0_TOP_FIELD_IS_LINE2      1
#define FS453_VID_CNTL0_OBIN_USIG_UNSIGNED      0
#define FS453_VID_CNTL0_OBIN_USIG_OFFSETBIN     1
#define FS453_VID_CNTL0_VSYNC5_6_6HALF_LINES    0
#define FS453_VID_CNTL0_VSYNC5_6_5HALF_LINES    1
#define FS453_VID_CNTL0_VID_MODE_COMPOSIT_SVIDEO    0
#define FS453_VID_CNTL0_VID_MODE_SDTV_YPRPB     1
#define FS453_VID_CNTL0_VID_MODE_SCART          1
#define FS453_VID_CNTL0_VID_MODE_HDTV_YPRPB     2
#define FS453_VID_CNTL0_VID_MODE_VGA_RGB        2

//0x9E
#define FS453_DAC_CNTL_DAC_MUX_SIGNAL0          0
#define FS453_DAC_CNTL_DAC_MUX_SIGNAL1          1
#define FS453_DAC_CNTL_DAC_MUX_SIGNAL2          2
#define FS453_DAC_CNTL_DAC_MUX_SIGNAL3          3

//0xa0
#define FS453_PWR_MGNT_GTLIO_PD_POWERDOWN_MODE  1
#define FS453_PWR_MGNT_GTLIO_PD_NORMAL_MODE     0
#define FS453_PWR_MGNT_PLL_PD_POWERDOWN_MODE    1
#define FS453_PWR_MGNT_PLL_PD_NORMAL_MODE       0
#define FS453_PWR_MGNT_CLK_SOFF_HDTV_CLK_OFF    1
#define FS453_PWR_MGNT_CLK_SOFF_SDTV_CLK_OFF    2

//0xC4
#define FS453_QPR_SET_INITIATE                  9
#define FS453_QPR_QK_UIM_RESERVED               0
#define FS453_QPR_QK_UIM_NVIDIA                 1
#define FS453_QPR_QK_UIM_INTEL                  2
#define FS453_QPR_QK_UIM_NATIONAL               3
#define FS453_QPR_QK_OS_SDTV                    0
#define FS453_QPR_QK_OS_480P                    1
#define FS453_QPR_QK_OS_720P                    2
#define FS453_QPR_QK_OS_1080I                   3
#define FS453_QPR_QK_YC_IN_RGB                  0
#define FS453_QPR_QK_YC_IN_YCRCB                1
#define FS453_QPR_QK_OM_SVIDEO_COMPOSITE        0
#define FS453_QPR_QK_OM_YPRPB                   1
#define FS453_QPR_QK_OM_SCART                   2
#define FS453_QPR_QK_OM_VGA                     3
#define FS453_QPR_QK_UO_OVERSCAN                0
#define FS453_QPR_QK_UO_UNDERSCAN               1
#define FS453_QPR_QK_GMODE_VGA                  0
#define FS453_QPR_QK_GMODE_NTSC_PAL             1
#define FS453_QPR_QK_GMODE_SVGA                 2
#define FS453_QPR_QK_GMODE_XGA                  3
#define FS453_QPR_QK_PN_NTSC                    0
#define FS453_QPR_QK_PN_PAL                     1

#define FS453_ID_NUMBER                         0xFE05
//-----------------------------------------------------------------------------
// Types

#define FS453_UNDERSCAN_TVIMAGE_BOOL    FALSE // false:overscan 240*320 to 640*480

typedef enum {
    TVOUT_MODE_NTSC = 0,
    TVOUT_MODE_PAL,
    TVOUT_MODE_LCD,
    TVOUT_MODE_MAX,
} TVOUT_MODE;

typedef enum {
    TVIN_COLOR_RGB = 0,
    TVIN_COLOR_YCRCB,
    TVIN_COLOR_MAX,
} TVIN_COLOR;


typedef enum {
    TVOUT_DAC_A = 1,
    TVOUT_DAC_B = (1<<1),
    TVOUT_DAC_C = (1<<2),
    TVOUT_DAC_D = (1<<3),
    TVOUT_DAC_ALL = 0xF
} TVOUT_DAC;

typedef enum
{
    FS453_PARAM_PLL_NCONL = 0,
    FS453_PARAM_PLL_NCONH,
    FS453_PARAM_PLL_NCODL,
    FS453_PARAM_PLL_NCODH,
    FS453_PARAM_PLL_M,
    FS453_PARAM_PLL_N,
    FS453_PARAM_PLL_P_IP,
    FS453_PARAM_PLL_P_EP,
    FS453_PARAM_POSITION_HORIZ,
    FS453_PARAM_POSITION_VERTI,
    FS453_PARAM_HACTIVE,
    FS453_PARAM_SCALE_VERTI,
    FS453_PARAM_SCALE_HORIZ_UPSCALE,
    FS453_PARAM_SCALE_HORIZ_DOWNSCALE,
    FS453_PARAM_UNDERSCALE,
    FS453_PARAM_FIFO_LATENCY,
    FS453_PARAM_MAX,
}FS453_PARAMETER;

typedef DWORD FS453PARAM;


//-----------------------------------------------------------------------------
// Defines
BOOL Fs453Init(void);
BOOL Fs453Deinit(void);
BOOL Fs453Configure(TVIN_COLOR color, TVOUT_MODE mode);
BOOL Fs453Configure(TVIN_COLOR color, TVOUT_MODE mode);
BOOL Fs453DACOn(TVOUT_DAC dac);
BOOL Fs453DACOff(TVOUT_DAC dac);
BOOL Fs453ColorBarOn(BOOL bON);

//////////////////////// config lcdc for panel
// 1.
// Dummy panel for SHARP QVGA.
static struct DisplayPanel panelSHARPQVGA = {
    240,
    320,
    2,
    16,
    9,
    1,
    9,
    7
};
 
// 2.
// Dummy panel for graphic_window QVGA.
static struct DisplayPanel panelGWQVGA = {
    240,
    320,
    0,
    0,
    0,
    0,
    0,
    0
};
 
// 3.
// Dummy panel for NEC QVGA.
static struct DisplayPanel panelNECVGA = {
    640,
    480,
    2,
    0,
    1,
    1,
    1,
    1
};

// 4.
// Dummy panel for TVout mode PAL.
static struct DisplayPanel panelTVPAL = {
    640,
    480,
    60,
    225,
    35,
    20,
    22,
    33
};
 
// 5.
// Dummy panel for TVout mode NTSC.
static struct DisplayPanel panelTVNTSC = {
    640,
    480,
    60,
    120,
    38,
    1,
    1,
    36
};
 
// 6.
// Dummy panel for TVout mode VGA.
static struct DisplayPanel panelTVVGA = {
    640,
    480,
    46,
    45,
    35,
    5,
    1,
    9
};
#ifndef __cplusplus
    }
#endif
#endif /* __DRIVERS_FS453_H__ */