configlcdc.cpp

Microsoft WinCE 6.0 BSP FINAL release source code for use with the i.MX27ADS TO2 WCE600_FINAL_MX27_S

        + pDisplayPanel->hwait2;
    dVtotal = pDisplayPanel->height + pDisplayPanel->vsync_width + pDisplayPanel->vwait1
        + pDisplayPanel->vwait2;
    uLCDPixClk = dHtotal*dVtotal*pCLcdcMode->frequency;
    if(bTVModeActive)
    {
        dPCR = 
              CSP_BITFVAL(LCDC_PCR_SHARP, LCDC_PCR_SHARP_DISABLE) |
              CSP_BITFVAL(LCDC_PCR_SCLKIDLE, LCDC_PCR_SCLKIDLE_ENABLE) |
              CSP_BITFVAL(LCDC_PCR_ACDSEL, LCDC_PCR_ACDSEL_USE_FRM)|
              CSP_BITFVAL(LCDC_PCR_OEPOL, LCDC_PCR_OEPOL_ACTIVE_LOW) |
              CSP_BITFVAL(LCDC_PCR_CLKPOL, LCDC_PCR_CLKPOL_POS_EDGE) |
              CSP_BITFVAL(LCDC_PCR_PIXPOL, LCDC_PCR_PIXPOL_ACTIVE_HIGH);
    }
    else
    {
        if(dwPanelType == 0) //QVGA
        {
            dPCR = 
                  CSP_BITFVAL(LCDC_PCR_SHARP, LCDC_PCR_SHARP_ENABLE) |
                  CSP_BITFVAL(LCDC_PCR_PIXPOL, LCDC_PCR_PIXPOL_ACTIVE_LOW);
        }
        else // VGA
        {
            dPCR = 
                  CSP_BITFVAL(LCDC_PCR_SHARP, LCDC_PCR_SHARP_DISABLE) |
                  CSP_BITFVAL(LCDC_PCR_PIXPOL, LCDC_PCR_PIXPOL_ACTIVE_HIGH);
        }
        dPCR |= 
              CSP_BITFVAL(LCDC_PCR_SCLKIDLE, LCDC_PCR_SCLKIDLE_DISABLE) |
              CSP_BITFVAL(LCDC_PCR_OEPOL, LCDC_PCR_OEPOL_ACTIVE_HIGH) |
              CSP_BITFVAL(LCDC_PCR_CLKPOL, LCDC_PCR_CLKPOL_NEG_EDGE) |
              CSP_BITFVAL(LCDC_PCR_ACDSEL, LCDC_PCR_ACDSEL_USE_LPHSYNC);
    }
    dPCR |= 
              CSP_BITFVAL(LCDC_PCR_SCLKSEL, LCDC_PCR_SCLKSEL_ENABLE) |
              CSP_BITFVAL(LCDC_PCR_REV_VS, LCDC_PCR_REV_VS_NORMAL) |
              CSP_BITFVAL(LCDC_PCR_SWAP_SEL, LCDC_PCR_SWAP_SEL_16BPP) |
              CSP_BITFVAL(LCDC_PCR_END_SEL, LCDC_PCR_END_SEL_LITTLE_ENDIAN) |
              CSP_BITFVAL(LCDC_PCR_LPPOL, LCDC_PCR_LPPOL_ACTIVE_HIGH) |
              CSP_BITFVAL(LCDC_PCR_FLMPOL, LCDC_PCR_FLMPOL_ACTIVE_HIGH) |
              CSP_BITFVAL(LCDC_PCR_PBSIZ, LCDC_PCR_PBSIZ_8BIT) |
              CSP_BITFVAL(LCDC_PCR_COLOR, LCDC_PCR_COLOR_COLOR) |
              CSP_BITFVAL(LCDC_PCR_TFT, LCDC_PCR_TFT_ACTIVE) |
              CSP_BITFVAL(LCDC_PCR_PCD, LCDC_PCD_VALUE(uLCDRefClk, uLCDPixClk));
    switch(pCLcdcMode->Bpp)
    {
        case 1:
            dPCR |= CSP_BITFVAL(LCDC_PCR_BPIX, LCDC_PCR_BPIX_1BPP);
            break;
        case 2:
            dPCR |= CSP_BITFVAL(LCDC_PCR_BPIX, LCDC_PCR_BPIX_2BPP);
            break;
        case 4:
            dPCR |= CSP_BITFVAL(LCDC_PCR_BPIX, LCDC_PCR_BPIX_4BPP);
            break;
        case 8:
            dPCR |= CSP_BITFVAL(LCDC_PCR_BPIX, LCDC_PCR_BPIX_8BPP);
            break;
        case 12:
            dPCR |= CSP_BITFVAL(LCDC_PCR_BPIX, LCDC_PCR_BPIX_12BPP);
            break;
        case 16:
            dPCR |= CSP_BITFVAL(LCDC_PCR_BPIX, LCDC_PCR_BPIX_16BPP);
            break;
        case 18:
            dPCR |= CSP_BITFVAL(LCDC_PCR_BPIX, LCDC_PCR_BPIX_18BPP);
            break;
        default:
            goto cleanup;
    }
    OUTREG32(&pLCDC->PCR, dPCR);

    // LCDC Horizontal Configuration Register
    OUTREG32(&pLCDC->HCR, 
              (CSP_BITFVAL(LCDC_HCR_H_WIDTH, (pDisplayPanel->hsync_width - 1))|
              CSP_BITFVAL(LCDC_HCR_H_WAIT_1, (pDisplayPanel->hwait1 - 1))|
              CSP_BITFVAL(LCDC_HCR_H_WAIT_2, (pDisplayPanel->hwait2 - 3))));

    // LCDC Vertical Configuration Register
    OUTREG32(&pLCDC->VCR, 
              (CSP_BITFVAL(LCDC_VCR_V_WIDTH, (pDisplayPanel->vsync_width))|
              CSP_BITFVAL(LCDC_VCR_V_WAIT_1, (pDisplayPanel->vwait1))|
              CSP_BITFVAL(LCDC_VCR_V_WAIT_2, (pDisplayPanel->vwait2))));

    // LCDC Panning Offset Register
    OUTREG32(&pLCDC->POR, 0);

    // LCDC Sharp Configuration Register
    OUTREG32(&pLCDC->SCR, 
          (CSP_BITFVAL(LCDC_SCR_GRAY1, 0) |
          CSP_BITFVAL(LCDC_SCR_GRAY2, 0) |
          CSP_BITFVAL(LCDC_SCR_REV_TOGGLE_DELAY, 3) |
          CSP_BITFVAL(LCDC_SCR_CLS_RISE_DELAY, 18) |
          CSP_BITFVAL(LCDC_SCR_PS_RISE_DELAY, 0))); // 0001 = 2 LSCLK period

    // LCDC PWM Contrast Control Register
    OUTREG32(&pLCDC->PCCR, 
          (CSP_BITFVAL(LCDC_PCCR_PW, LCDC_PCCR_PW_MAX / 2) |
          CSP_BITFVAL(LCDC_PCCR_CC_EN, LCDC_PCCR_CC_EN_ENABLE) |
          CSP_BITFVAL(LCDC_PCCR_SCR, LCDC_PCCR_SCR_PIXELCLK) |
          CSP_BITFVAL(LCDC_PCCR_LDMSK, LCDC_PCCR_LDMSK_DISABLE) |
          CSP_BITFVAL(LCDC_PCCR_CLS_HI_WIDTH, 169)));

    // LCDC DMA Control Register
    OUTREG32(&pLCDC->DCR,
              (CSP_BITFVAL(LCDC_DCR_BURST, LCDC_DCR_BURST_DYNAMIC)|
              CSP_BITFVAL(LCDC_DCR_HM, (0x02))|   // DMA High Mark
              CSP_BITFVAL(LCDC_DCR_TM, (0x10)))); // DMA Trigger Mark

    // LCDC Interrupt Configuration Register
    OUTREG32(&pLCDC->ICR,
          (CSP_BITFVAL(LCDC_ICR_GW_INT_CON, LCDC_ICR_GW_INT_CON_END) |
          CSP_BITFVAL(LCDC_ICR_INTSYN, LCDC_ICR_INTSYN_PANEL) |
          CSP_BITFVAL(LCDC_ICR_INTCON, LCDC_ICR_INTCON_BOF)));

    // LCDC Interrupt Enable Register
    OUTREG32(&pLCDC->IER, 0);

    // LCDC Graphic Window

    // LCDC Graphic Window Start Address Register
    OUTREG32(&pLCDC->GWSAR, 
              (CLcdcCtx.VideoMemoryPhyAdd));

    // LCDC Graphic Window DMA Control Register
    OUTREG32(&pLCDC->GWDCR, 
              (CSP_BITFVAL(LCDC_GWDCR_GWBT, LCDC_GWDCR_GWBT_DYNAMIC)|
              CSP_BITFVAL(LCDC_GWDCR_GWHM, 0x02)|
              CSP_BITFVAL(LCDC_GWDCR_GWTM, 0x10)));

    // Graphic window at first time can only be enabled while the HCLK to the LCDC is disabled. 
    // Once enabled it can subsequently be disabled and enabled without turning off the HCLK.
    // So we need to enable and then disable the graphic window at hardware init part(configlcdc),
    // then at next time to enable graphic window, the HCLK to LCDC does not need to be disabled, and the flicker (due to disabling of HCLK to LCDC) is avoided.
    {
        // Enable graphic window
        // LCDC Graphic Window Size Register
        OUTREG32(&pLCDC->GWSR, 
                  (CSP_BITFVAL(LCDC_GWSR_GWW, (pDisplayPanel->width >> 4))|
                  CSP_BITFVAL(LCDC_GWSR_GWH, pDisplayPanel->height)));

        // LCDC Graphic Window Virtual Page Width Register
        OUTREG32(&pLCDC->GWVPWR, 
                  (pDisplayPanel->width / (32/pCLcdcMode->Bpp))); // the number of 32-bit words

        // LCDC Graphic Window Position Register
        OUTREG32(&pLCDC->GWPR, 
                  (CSP_BITFVAL(LCDC_GWPR_GWXP, 0)|
                  CSP_BITFVAL(LCDC_GWPR_GWYP, 0)));

        // LCDC Graphic Window Panning Offset Register
        OUTREG32(&pLCDC->GWPOR, 
                  16);

        // LCDC Graphic Window Control Registers
        OUTREG32(&pLCDC->GWCR, 
                  (CSP_BITFVAL(LCDC_GWCR_GWAV, LCDC_GWCR_GWAV_OPAQUE)|
                  CSP_BITFVAL(LCDC_GWCR_GWCKE, LCDC_GWCR_GWCKE_DISABLE)|
                  CSP_BITFVAL(LCDC_GWCR_GWE, LCDC_GWCR_GWE_ENABLE)|
                  CSP_BITFVAL(LCDC_GWCR_GW_RVS, LCDC_GWCR_GW_RVS_NORMAL)|
                  CSP_BITFVAL(LCDC_GWCR_GWCKR, 0)|
                  CSP_BITFVAL(LCDC_GWCR_GWCKG, 0)|
                  CSP_BITFVAL(LCDC_GWCR_GWCKB, 0)));
  
        // Disable graphic window
        CLRREG32(&pLCDC->GWCR, CSP_BITFMASK(LCDC_GWCR_GWAV));

        // LCDC Graphic Window Size Register
        OUTREG32(&pLCDC->GWSR, 
                  (CSP_BITFVAL(LCDC_GWSR_GWW, (16 >> 4))|
                  CSP_BITFVAL(LCDC_GWSR_GWH, 16)));
        Sleep(100);

        CLRREG32(&pLCDC->GWCR, CSP_BITFMASK(LCDC_GWCR_GWE));
    }

    LCDCEnable(TRUE);

    if (bTVModeActive)
    {
        // Initialize and turn on TV Out
        if (!BSPInitializeTVOut(bTVNTSCOut))
        {
            DEBUGMSG(1, (TEXT("InitializeTVOut Failed")));
            goto cleanup;
        }
    }
    else
    {
        // Turn on lcd panel
        BSPTurnOnLCD();

        // Disable TV Out if LCD active
        if (!BSPDeinitializeTVOut())
        {
            DEBUGMSG(1, (TEXT("DeinitializeTVOut Failed")));
            // goto cleanup; // No impact to lcdc
        }
    }

    rc = TRUE;

cleanup:
    return rc;
}