mx27_irq.h

Microsoft WinCE 6.0 BSP FINAL release source code for use with the i.MX27ADS TO2 WCE600_FINAL_MX27_S

//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//-----------------------------------------------------------------------------
//
// Copyright (C) 2004, MOTOROLA, INC. All Rights Reserved
// THIS SOURCE CODE IS CONFIDENTIAL AND PROPRIETARY AND MAY NOT
// BE USED OR DISTRIBUTED WITHOUT THE WRITTEN PERMISSION OF
// MOTOROLA, INC.
//
//------------------------------------------------------------------------------
//
// Copyright (C) 2004-2006, Freescale Semiconductor, Inc. All Rights Reserved.
// THIS SOURCE CODE, AND ITS USE AND DISTRIBUTION, IS SUBJECT TO THE TERMS
// AND CONDITIONS OF THE APPLICABLE LICENSE AGREEMENT
//
//-----------------------------------------------------------------------------
//
// File:  mx27_irq.h
//
// This file defines names for IRQ. These names have no other role than make
// code more readable. For SoC where device - IRQ mapping is defined by
// silicon and it can't be changed by software.
//
//-----------------------------------------------------------------------------
#ifndef __MX27_IRQ_H__
#define __MX27_IRQ_H__

//-----------------------------------------------------------------------------
// MX27 IRQ DEFINITIONS
//-----------------------------------------------------------------------------
#define IRQ_RESERVED0       0
#define IRQ_I2C2            1
#define IRQ_GPT6            2
#define IRQ_GPT5            3
#define IRQ_GPT4            4
#define IRQ_RTIC            5
#define IRQ_CSPI3           6
#define IRQ_MSHC            7 
#define IRQ_GPIO            8 
#define IRQ_SDHC3           9 
#define IRQ_SDHC2           10
#define IRQ_SDHC1           11
#define IRQ_I2C1            12
#define IRQ_SSI2            13
#define IRQ_SSI1            14
#define IRQ_CSPI2           15
#define IRQ_CSPI1           16
#define IRQ_UART4           17
#define IRQ_UART3           18
#define IRQ_UART2           19
#define IRQ_UART1           20
#define IRQ_KPP             21
#define IRQ_RTC             22
#define IRQ_PWM             23
#define IRQ_GPT3            24
#define IRQ_GPT2            25
#define IRQ_GPT1            26
#define IRQ_WDOG            27
#define IRQ_PCMCIA          28
#define IRQ_NFC             29
#define IRQ_ATA             30
#define IRQ_CSI             31
#define IRQ_DMACH0          32
#define IRQ_DMACH1          33
#define IRQ_DMACH2          34
#define IRQ_DMACH3          35
#define IRQ_DMACH4          36
#define IRQ_DMACH5          37
#define IRQ_DMACH6          38
#define IRQ_DMACH7          39
#define IRQ_DMACH8          40
#define IRQ_DMACH9          41
#define IRQ_DMACH10         42
#define IRQ_DMACH11         43
#define IRQ_DMACH12         44
#define IRQ_DMACH13         45
#define IRQ_DMACH14         46
#define IRQ_DMACH15         47
#define IRQ_UART6           48 
#define IRQ_UART5           49
#define IRQ_FEC             50
#define IRQ_EMMAPRP         51
#define IRQ_EMMAPP          52
#define IRQ_H264            53
#define IRQ_USBHS1          54
#define IRQ_USBHS2          55
#define IRQ_USBOTG          56
#define IRQ_SMN             57
#define IRQ_SCM             58
#define IRQ_SAHARA          59
#define IRQ_SLCDC           60
#define IRQ_LCDC            61
#define IRQ_IIM             62 
#define IRQ_DPTC            63 

#define CSP_IRQ_AITC_MAX    64

//-----------------------------------------------------------------------------
// Physical interrupt IDs for
//      GPIO PortA interrupts:   64-95
//                              IRQ_GPIO_PA_0 - IRQ_GPIO_PA_31
//      GPIO PortB interrupts:   96-127
//                              IRQ_GPIO_PB_0 - IRQ_GPIO_PB_31
//      GPIO PortC interrupts:   128-159
//                              IRQ_GPIO_PC_0 - IRQ_GPIO_PC_31
//      GPIO PortD interrupts:   160-191
//                              IRQ_GPIO_PD_0 - IRQ_GPIO_PD_31
//      GPIO PortE interrupts:   192-223
//                              IRQ_GPIO_PE_0 - IRQ_GPIO_PE_31
//      GPIO PortF interrupts:   224-255
//                              IRQ_GPIO_PF_0 - IRQ_GPIO_PF_31
//-----------------------------------------------------------------------------
// GPIO PORT A
#define IRQ_GPIO_PA_0           (CSP_IRQ_AITC_MAX + 0) 
#define IRQ_GPIO_PA_1           (CSP_IRQ_AITC_MAX + 1) 
#define IRQ_GPIO_PA_2           (CSP_IRQ_AITC_MAX + 2) 
#define IRQ_GPIO_PA_3           (CSP_IRQ_AITC_MAX + 3) 
#define IRQ_GPIO_PA_4           (CSP_IRQ_AITC_MAX + 4) 
#define IRQ_GPIO_PA_5           (CSP_IRQ_AITC_MAX + 5) 
#define IRQ_GPIO_PA_6           (CSP_IRQ_AITC_MAX + 6) 
#define IRQ_GPIO_PA_7           (CSP_IRQ_AITC_MAX + 7) 
#define IRQ_GPIO_PA_8           (CSP_IRQ_AITC_MAX + 8) 
#define IRQ_GPIO_PA_9           (CSP_IRQ_AITC_MAX + 9)
#define IRQ_GPIO_PA_10          (CSP_IRQ_AITC_MAX + 10)
#define IRQ_GPIO_PA_11          (CSP_IRQ_AITC_MAX + 11)
#define IRQ_GPIO_PA_12          (CSP_IRQ_AITC_MAX + 12)
#define IRQ_GPIO_PA_13          (CSP_IRQ_AITC_MAX + 13)
#define IRQ_GPIO_PA_14          (CSP_IRQ_AITC_MAX + 14)
#define IRQ_GPIO_PA_15          (CSP_IRQ_AITC_MAX + 15)
#define IRQ_GPIO_PA_16          (CSP_IRQ_AITC_MAX + 16)
#define IRQ_GPIO_PA_17          (CSP_IRQ_AITC_MAX + 17)
#define IRQ_GPIO_PA_18          (CSP_IRQ_AITC_MAX + 18)
#define IRQ_GPIO_PA_19          (CSP_IRQ_AITC_MAX + 19)
#define IRQ_GPIO_PA_20          (CSP_IRQ_AITC_MAX + 20)
#define IRQ_GPIO_PA_21          (CSP_IRQ_AITC_MAX + 21)
#define IRQ_GPIO_PA_22          (CSP_IRQ_AITC_MAX + 22)
#define IRQ_GPIO_PA_23          (CSP_IRQ_AITC_MAX + 23)
#define IRQ_GPIO_PA_24          (CSP_IRQ_AITC_MAX + 24)
#define IRQ_GPIO_PA_25          (CSP_IRQ_AITC_MAX + 25)
#define IRQ_GPIO_PA_26          (CSP_IRQ_AITC_MAX + 26)
#define IRQ_GPIO_PA_27          (CSP_IRQ_AITC_MAX + 27)
#define IRQ_GPIO_PA_28          (CSP_IRQ_AITC_MAX + 28)
#define IRQ_GPIO_PA_29          (CSP_IRQ_AITC_MAX + 29)
#define IRQ_GPIO_PA_30          (CSP_IRQ_AITC_MAX + 30)
#define IRQ_GPIO_PA_31          (CSP_IRQ_AITC_MAX + 31)

// GPIO PORT B
#define IRQ_GPIO_PB_0           (CSP_IRQ_AITC_MAX + 32)
#define IRQ_GPIO_PB_1           (CSP_IRQ_AITC_MAX + 33)
#define IRQ_GPIO_PB_2           (CSP_IRQ_AITC_MAX + 34)
#define IRQ_GPIO_PB_3           (CSP_IRQ_AITC_MAX + 35)
#define IRQ_GPIO_PB_4           (CSP_IRQ_AITC_MAX + 36)
#define IRQ_GPIO_PB_5           (CSP_IRQ_AITC_MAX + 37)
#define IRQ_GPIO_PB_6           (CSP_IRQ_AITC_MAX + 38)
#define IRQ_GPIO_PB_7           (CSP_IRQ_AITC_MAX + 39)
#define IRQ_GPIO_PB_8           (CSP_IRQ_AITC_MAX + 40)
#define IRQ_GPIO_PB_9           (CSP_IRQ_AITC_MAX + 41)
#define IRQ_GPIO_PB_10          (CSP_IRQ_AITC_MAX + 42)
#define IRQ_GPIO_PB_11          (CSP_IRQ_AITC_MAX + 43)