ns954lib.c

NS954X tuner solution source code with RDS function

		}
	}
	//------------------------------------------------------------------
	// AM and ...(RSSI threshold & Station bit)
	//------------------------------------------------------------------
	else {
		for(i=0;i<DEF_SEEK_CHECK_COUNT;i++){
			ns_reg_station_en(0);
			ns_reg_station_en(1);
			host_wait_ms(DEF_WAIT_AFTER_STATION);

			state = host_Read(0x05);
			if((state&BIT_STATION)==0){
				bFail=1;
				break;
			}

			nRssi = host_Read(0x06) & 0x7F;
			if(nRssi<DEF_RSSI_THREASHOLD_AM){
				bFail=1;  // Threshold Error
				break;
			}
		}
	}

	if(bFail==0){
		return 1;
	}
	return 0;
}

//=============================================================================
// Audio Output Setup
//-----------------------------------------------------------------------------
// Parameter(s)
//  cmd = OUTPUT_ANALOG     (Analog only)
//        OUTPUT_ANA_IIS32  (Analog + IIS 32fs)
//        OUTPUT_ANA_IIS64  (Analog + IIS 64fs)
//        OUTPUT_IIS32      (IIS 32fs only)
//        OUTPUT_IIS64      (IIS 64fs only)
//-----------------------------------------------------------------------------
// Return Value
//  none
//=============================================================================
void ns_audio_out(u16 cmd)
{
	u8 v=0;

	switch(cmd){
   	case OUTPUT_ANALOG:    v=0x00; break;
	case OUTPUT_ANA_IIS32: v=0x0A; break;
	case OUTPUT_ANA_IIS64: v=0x0E; break;
	case OUTPUT_IIS32:     v=0x09; break;
	case OUTPUT_IIS64:     v=0x0D; break;
	default:
		return;
	}

	RegChange(0x0D,STB_0,0x1F,v);
}

//=============================================================================
// get State indicator
// return value is bit image.
//-----------------------------------------------------------------------------
// Parameter(s)
//  none
//-----------------------------------------------------------------------------
// Return Value
//  #define NS_STATE_POWER     0x0001
//  #define NS_STATE_MUTE      0x0002
//  #define NS_STATE_FORCEMONO 0x0004
//  #define NS_STATE_FM        0x1000
//  #define NS_STATE_OIRT      0x2000
//  #define NS_STATE_AM        0x4000
//  #define NS_STATE_STEREO    0x0010
//  #define NS_STATE_STATION   0x0020  AM Station indicator
//  #define NS_STATE_FOSAT     0x0040  FM Station indicator
//=============================================================================
u16 ns_get_state(void)
{
	u16 ret=0;
	u8 band;
	u8 reg0 = val_REG_00h();
	u8 reg5 = host_Read(0x05);

	band = reg0>>4;

	if(reg0&0x01)    ret|=NS_STATE_POWER;
	if(reg0&0x02)    ret|=NS_STATE_MUTE;
	if(reg0&0x04)    ret|=NS_STATE_FORCEMONO;

	if(reg5&0x02)    ret |= NS_STATE_STATION;
	if(!(reg5&0x04)) ret |= NS_STATE_FOSAT;
	
	ret |= 1 << (band+24); // FM,OIRT,AM,...

	if(band<2) { // FM and OIRT
		if(0==(ret&NS_STATE_FORCEMONO)) {
			if(reg5&0x01) ret |= NS_STATE_STEREO;
		}
	}
	return ret;
}

//-----------------------------------------------------------------------------
// get RSSI level
//-----------------------------------------------------------------------------
// Parameter(s)
//  none
//-----------------------------------------------------------------------------
// Return Value
//  RSSI value
//-----------------------------------------------------------------------------
u8 ns_get_rssi(void)
{
	return host_Read(0x06) & 0x7F;
}

//---- Local Function ---------------------------------------------------------
// Write Phase and Gain Register for ns_dsp_alignment
//-----------------------------------------------------------------------------
// Parameter(s)
//  phase : Phase adjustment value 
//  gain  : Gain adjustment value
//-----------------------------------------------------------------------------
// Return Value
//  none
//-----------------------------------------------------------------------------
void write_phase_gain(u8 phase,u16 gain)
{
	host_Write(0x38,(u8)(gain&0xFF));
	host_Write(0x39,((phase&0x0F)<<4) | ((gain>>8)&0x0F));
}

void Rx15(u8 mode,u8 wr,u8 adr,u8 st)
{
	host_Write(0x15,(adr<<4)|((mode)<<2)|((wr)<<1)|((st)&1));
}

void Rx17(u8 sel,u8 plt,u8 iml)
{
	host_Write(0x17,((sel)<<7)|((plt)<<6)|((iml)));
}

//=============================================================================
// DSP Alignment Table write function
//-----------------------------------------------------------------------------
// Parameter(s)
//  gain  : gain list
//  phase : phase list
//-----------------------------------------------------------------------------
// Return Value
//  1 : Complete
//  0 : Failed
//=============================================================================
u8 ns_table_write(u8 phase[4],u8 gain[4])
{
	u8 i,j,k;
	u8 Result=0;

	for(i=0;i<4;i++){
		write_phase_gain(phase[i],gain[i]);

		// retry 10(times)
		for(j=0;j<10;j++){
			Rx15(3,1,i,0);
			Rx15(0,1,i,1);

			// Running indicator check
			if((host_Read(0x05)&0x08)){

				host_wait_ms(100);

				// Running indicator check
				for(k=0;k<10;k++){
					if((host_Read(0x05)&0x08)) {
						host_wait_ms(10);
					} else {
						Result++;
						break;
					}
				}
				break;
			}
		}
		if(Result!=(i+1)){
			break;
		}
	}
	if(Result==4) {
		return 1;
	}
	return 0;
}

#define GAIN_MIN   103
#define GAIN_MAX   138
#define PHASE_MIN  2
#define PHASE_MAX  14

//=============================================================================
// DSP alignment Procedure - p and g
//-----------------------------------------------------------------------------
// Parameter(s)
//  ialgn : align address
//  pP    : P's pointer
//  pG    : G's pointer
//-----------------------------------------------------------------------------
// Return Value
//  0 : failed
//  1 : ok
//=============================================================================
u8 find_pg(u8 ialn,u8* pP,u8* pG)
{
	u8 gp[2];
	u8 i,j;

	for(i=0;i<16;i++){
		Rx15(2, 1, ialn, 0);
		Rx15(2, 1, ialn, 1);

		if((host_Read(0x05)&0x08)){
			for(j=0;j<20;j++) {
				if(host_Read(5)&8){ 
					host_wait_ms(10);
				} else {
					host_Read2(0x65,gp,2);

					if( (GAIN_MIN<=gp[0] && gp[0]<=GAIN_MAX) && 
						(PHASE_MIN<=gp[1] && gp[1]<=PHASE_MAX) ) {
						*pG = gp[0];
						*pP = gp[1];
						return 1;
					}
				}
			}
		}
	}
	return 0;
}

//=============================================================================
// DSP alignment Procedure - Find Best IML
//-----------------------------------------------------------------------------
// Parameter(s)
//  iml : start iml value
//-----------------------------------------------------------------------------
// Return Value
//  selected iml value
//=============================================================================
u8 best_iml(u8 iml)
{
	host_Write(0x32,0x00);

	for(;iml<16;iml++){
		Rx17(1,1,iml);
		host_wait_ms(5);
		if(0==(host_Read(0x70)&0x08)){
			break; 
		}
	}
	iml--;
	Rx17(1,1,iml);
	host_Write(0x32,0x80);

    host_wait_ms(5);
    host_Write(0xFE,0x0A);
    host_wait_ms(20);

	return iml;
}

//=============================================================================
// DSP alignment Procedure - IMF adjust
//-----------------------------------------------------------------------------
// Parameter(s)
//  none
//-----------------------------------------------------------------------------
// Return Value
//  none
//=============================================================================
void imf_adjust(void)
{
	u8 bF=0;
	u8 fhm,imf;
	u8 g_fhm=0xF0; // 0xFx : un-initialized flag, 0x?0: default=0

	host_Write(0x15,0x0E);
	host_Write(0x3D,0x27); 

	for(fhm=0;fhm<4;fhm++){
		bF=0;
		for(imf=0;imf<3;imf++){
			host_Write(0x37,fhm);
			host_Write(0x16,22+imf);
			host_wait_ms(10);
			if((host_Read(0x70)&0x0C)==0x0C) {
				bF++;

				// (22+imf)==23 && (un-initialized) -> select current fhm
				if(imf==1 && (g_fhm&0xF0)){
					g_fhm=fhm;
				}
			}
		}
		if(bF==3) {
			g_fhm=fhm;
			break;
		}
	}

	host_Write(0x37,(g_fhm&0x03)|0x80);
	host_Write(0x16,23);
	host_Write(0x3D,0x37); 
	host_wait_ms(50);
}

//=============================================================================
// DSP alignment Procedure - main loop
//-----------------------------------------------------------------------------
// Parameter(s)
//  none
//-----------------------------------------------------------------------------
// Return Value
//  0 : failed
//  1 : complete
//=============================================================================
u8 dsp_align_body(void)
{
	u16 fp,fg;
	u8 ialgn;
	u8 Result=1;
	u8 Fine_Phase;
	u8 Fine_Gain;
	u8 iml=5;
	u8 cnt;
	u8 Fine_P[4];
	u8 Fine_G[4];

	for(ialgn=0;ialgn<4;ialgn++) {
		Rx15(2,1,ialgn,0);
		host_wait_ms(140);
		// Best IML search
		iml = best_iml(iml);
        
		fp=fg=0;

		// Best Phase & Gain search
		for(cnt=0;cnt<=4;cnt++){			
			if(find_pg(ialgn,&Fine_Phase,&Fine_Gain)) {
				fg += Fine_Gain;
				fp += Fine_Phase;
	            
				if(cnt==2 && ialgn<2){
					cnt++;
					break;
				}
			} else {
				Result = 0;
				break;
			}
		}

		if(Result){
			Fine_P[ialgn] = fp / cnt;
			Fine_G [ialgn] = fg / cnt;
		} else {
			break;
		}
	}

	if(Result){
		ns_table_write(Fine_P,Fine_G); // commit
	}

	return Result;
}

//=============================================================================
// DSP alignment Procedure
//-----------------------------------------------------------------------------
// Parameter(s)
//  none
//-----------------------------------------------------------------------------
// Return Value
//  0 : failed
//  1 : complete
//=============================================================================
u8 ns_dsp_alignment(void)
{
	u8 Result;
	RegChange(0x0E,STB_5,0x3,0x2); // BW=2
	host_Write(0x01,0x08);
	host_Write(0x15,0x0C);
	host_Write(0x16,0x17);
	host_Write(0x37,0x82);
	host_Write(0x3D,0x37);

	host_wait_ms(50);

	imf_adjust();
	Result = dsp_align_body();

	host_Write(0x01,0x38);
	RegChange(0x0E,STB_5,0x3,0x1); // BW=1
	host_Write(0x15,0xC0);
	host_Write(0x17,0x20);
	host_Write(0x32,0x00);
	host_Write(0x37,0x01);
	return Result;
}