eb40a.h

44BO 的UCGUI包

/*----------------------------------------------------------------------------
*         ATMEL Microcontroller Software Support  -  ROUSSET  -
*----------------------------------------------------------------------------
* The software is delivered "AS IS" without warranty or condition of any
* kind, either express, implied or statutory. This includes without
* limitation any warranty or condition with respect to merchantability or
* fitness for any particular purpose, or against the infringements of
* intellectual property rights of others.
*----------------------------------------------------------------------------
* File Name           : eb40a.h
* Object              : AT91R40008 Evaluation Board Features Definition File.
*
* 1.0 23/Apr/00  PFi  : Creation
* 1.1 11/Jan/02  PFi  : Internal/External SRAM Definition Clean-up
*----------------------------------------------------------------------------
*/
#ifndef eb40a_h
#define eb40a_h
#include "../../INC/AT91R40008.h"
#include "../../INC/lib_AT91R40008.h"

/*---------------------------------------*/
/* AT91EB40A External Memories Definition */
/*---------------------------------------*/

/* Flash Memory : AT49BV162 1M*16 */
#define FLASH_BASE      (0x01000000)
#define FLASH_SIZE      (2*1024*1024)                /* byte */

/***************
*  WARNING !!!*
***************
*- WARNING !! No External SRAM memories are fitted on the board.
*- This definition is only if the user adds external SRAM devices.

* The following definition are put in comments
*/
#define RAM_BASE     (0x00000000)    /* Address of the Internal SRAM after the remap command */
#define RAM_SIZE     (8*1024)

/***************
* WARNING !!! *  The RAM_LIMIT definition does not correspond to ( RAM_BASE + RAM_SIZE )
***************

* This is for compatipility with the cstartup_xxx.ads (flash, ice or angel).
*/
#define RAM_LIMIT     (RAM_BASE + (8*1024))       /* Size of the Application stack is 8K. */

/* The internal RAM is mapped at address 0x00300000 after reset until
   Remap command is performed on the EBI. */

//#define RAM_BASE_BOOT   ((u_int *)0x00300000)

/*-----------------*/
/* Leds Definition */
/*-----------------*/
#define LED_SER		(1<<4)	/* P4 */
#define	LED_SCK		(1<<5)	/* P5 */
#define	LED_G		(1<<6)	/* P6 */

#define LED_MASK    (LED_SER | LED_SCK | LED_G)

//- KEY Definition
#define	KEY1		(1)		/* P0 */
#define KEY2		(1<<30)	/* P30 */

#define	KEY_MASK	(KEY1 | KEY2)

//- Updata Enable
#define	UPDATA_EA	(1<<20)	/* P20 */

//- 3BSA DISP Definition
//#define	BSA_SD		(1<<22)	/* P22 */
//#define	BSA_STB		(1<<20)	/* P20 */
//#define	BSA_ACK		(1<<21)	/* P21 */
//#define	KEY			(1<<23)	/* P23 */

//- 3BSB PRT Definition
#define	BSB_SD		(1<<16)	/* P16 */
#define	BSB_ACK		(1<<17)	/* P17 */
#define	BSB_STB		(1<<18)	/* P18 */

#define	BSB_MASK	(BSB_SD|BSB_ACK|BSB_STB)

//- I2C Time Definition - PCF8563
#define	I2C_SDA		(1<<7)	/* P7 */
#define	I2C_SCL		(1<<8)	/* P8 */
#define I2C_CLK		(1<<11)	/* P11 */

#define I2C_MASK	(I2C_SDA|I2C_SCL|I2C_CLK)

//- Time Definition - DS1302
#define	DS1302_RST	(1<<7)	/* P7 */  
#define	DS1302_SDA  (1<<8)	/* P8 */  
#define	DS1302_CLK	(1<<11)	/* P11 */ 

#define	DS1302_MASK	(DS1302_RST|DS1302_SDA|DS1302_CLK)

//- COM0 IO Definition
#define	COM0_DTR0	(1<<1)	/* P1 */
#define	COM0_DSR0	(1<<2)	/* P2 */
#define	COM0_CD		(1<<3)	/* P3 */
#define	COM0_RI		(1<<13)	/* P13 */

#define COM0_MASK	(COM0_DSR0|COM0_CD|COM0_RI)

//-Flask Definition - K9F6408U0C
#define	NANDFR_B		(1<<19) /* P19 */

#define	NIC_IRQ0		(1<<9)	//P9

#define	USB_IRQ1		(1<<10)	//P10

/*------------------------------------------------------------------------
							外部驱动地址定义
-------------------------------------------------------------------------*/
#define		NET_BASE	0x3000000	//RTL8019AS 
#define		CPLD_BASE	0x4000000	//ATF1504AS
#define		USB_BASE	0x5000000	//CH375

#define		DBSPIO		(CPLD_BASE)
#define		DBSPRDY		(CPLD_BASE | 0x20000)	//D0-IRDY D1-ORDY D7-DSR1
#define		WOTHER		(CPLD_BASE | 0x20000)	//D0-LINIT(LDK及DBSP复位) D1-PINIT D2-DRAW D3-SPEAK
#define		COMSLT		(CPLD_BASE | 0x40000)	//00-COM2(条形码) 01-COM3(9) 10-COM4(25) 11-BB/EIC
#define		NANDFCE		(CPLD_BASE | 0x80000)	//NAND FLASH CE
#define		NANDFLASH	(CPLD_BASE | 0x60000)	//NAND FLASH DFRE/DFWE
#define		NANDFORD	(NANDFLASH | 0x10000)	//A16 = 1 A15 = 0
#define		NANDFADDR	(NANDFLASH | 0x08000)	//A16 = 0 A15 = 1
#define		DTR11		(CPLD_BASE | 0xA0000)	//~D0

#define		USBCMD		(USB_BASE | 0x02)		//CH375命令读写端口
#define		USBDAT		(USB_BASE)				//CH375数据读写端口

//DBSP	驱动
#define		IRDY 		(1)
#define		ORDY 		(1<<1)
#define		DSR1 		(1<<7)

/*杂项驱动锁存*/
#define		LINIT		(1)				//显示复位
#define		PINIT		(1<<1)			//打印机复位		
#define		DRAW 		(1<<2)			//钱箱
#define		BELL 		(1<<3)			//发声
                 		
#define		DTR1 		(1)				//DTR1


/*--------------*/
/* Master Clock */
/*--------------*/

#define MCK             32768000
#define MCKKHz          (MCK/1000)
#define MCKMHZ			(MCK/1000000)

#define USART1_INTERRUPT_LEVEL		0
#define TIMER0_INTERRUPT_LEVEL		1
#define TIMER1_INTERRUPT_LEVEL		2
#define IRQ0_INTERRUPT_LEVEL		3
#define IRQ1_INTERRUPT_LEVEL		4
#define USART0_INTERRUPT_LEVEL		5

#define TIMER2_INTERRUPT_LEVEL		6

/*-----------------*/
/* Clock Selection */
/*-----------------*/
#define TC_CLKS                  0x7
#define TC_CLKS_MCK2             0x0
#define TC_CLKS_MCK8             0x1
#define TC_CLKS_MCK32            0x2
#define TC_CLKS_MCK128           0x3
#define TC_CLKS_MCK1024          0x4

#endif /* eb40a_h */