uart232_pl4_lite_src_top.veo

spi接口的vhdl实现

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// The following must be inserted into your Verilog file for this
// core to be instantiated. Change the instance name and port connections
// (in parentheses) to your own signal names.

//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG
uart232_pl4_src_top YourInstanceName(
     // common signals
    .reset_n               (Reset_n),
    .srctristateen        (SrcTriStateEn),
    .srcfiforeset_n       (SrcFifoReset_n),
    .dcmreset_tdclk       (DcmReset_TDClk),
    .locked_tdclk         (Locked_TDClk),
    .dcmlost_tdclk        (DcmLost_TDClk),
    .srclksrdy            (SrcClksRdy),
    .sysclk_p             (SysClk_P),
    .sysclk_n             (SysClk_N),
 
    // source general purpose clocks
    .sysclk180_gp         (SysClk180_GP),
    .tsclk_gp             (TSClk_GP),
    .sysclk0_gp           (SysClk0_GP),

  

    // Source Calendar I/O
    .srccalendar_m        (SrcCalendar_M),
    .srccalendar_len      (SrcCalendar_Len),
    .srccalclk            (SrcCalClk),
    .srccalwren_n         (SrcCalWrEn_n),
    .srccaladdr           (SrcCalAddr),
    .srccaldata           (SrcCalData),
    .srccaldataout        (SrcCalDataOut),	

		   
    .srcstatclk           (SrcStatClk),
    .srcstataddr          (SrcStatAddr),

    .srcstat              (SrcStat),
    .srcstatch            (SrcStatCh),
    .srcstatchvalid       (SrcStatChValid),	
  
    // FIFO I/O
    .srcffclk             (SrcFFClk),
    .srcffwren_n          (SrcFFWrEn_n),
    .srcffaddr            (SrcFFAddr),
    .srcffdata            (SrcFFData),
    .srcffmod             (SrcFFMod),
    .srcffsop             (SrcFFSOP),
    .srcffeop             (SrcFFEOP),
    .srcfferr             (SrcFFErr),
    .srcffoverflow_n      (SrcFFOverflow_n),
    .srcffalmostfull_n    (SrcFFAlmostFull_n),
  
    // Control and status signals
    .srcen                (SrcEn),
    .idlerequest          (IdleRequest),
    .trainingrequest      (TrainingRequest),
    .srcoofoverride       (SrcOofOverride),
    .srcoof               (SrcOof),
    .srcdip2err           (SrcDIP2Err),
    .srcstatframeerr      (SrcStatFrameErr),
    .srcpatternerr        (SrcPatternErr),
  
    // FIFO status interface
    .tsclk                (TSClk),
    .tstat                (TStat),
 
    // PL4 source bus
    .tdclk_p              (TDClk_P),
    .tdclk_n              (TDClk_N),
    .tdat_p               (TDat_P),
    .tdat_n               (TDat_N),
    .tctl_p               (TCtl_P),
    .tctl_n               (TCtl_N),
 
    // Configuration signals
    .srcafthresassert     (SrcAFThresAssert),
    .srcafthresnegate     (SrcAFThresNegate),
    .datamaxt             (DataMaxT),
    .alphadata            (AlphaData),
    .srcburstlen          (SrcBurstLen),
    .srcburstmode         (SrcBurstMode),
    .numdip2errors        (NumDip2Errors),
    .numdip2matches       (NumDip2Matches));

// INST_TAG_END ------ End INSTANTIATION Template ---------