hdpdeps.ref

spi接口的vhdl实现

      LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_data_payload/xilinx 1217583237 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_payload.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_data_payload 1217583236
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_fifo.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_fifo 1217583216 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_fifo.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/std_logic_arith 1177545576 \
      PB ieee/STD_LOGIC_UNSIGNED 1177545583 PB ieee/std_logic_misc 1177545582 \
      LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_fifo/xilinx 1217583217 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_fifo.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_fifo 1217583216 CP pl4_async_burst_fifo
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_fifo_64.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_fifo_64 1217583218 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_fifo_64.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/std_logic_arith 1177545576 \
      PB ieee/STD_LOGIC_UNSIGNED 1177545583 PB ieee/std_logic_misc 1177545582 \
      LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_fifo_64/xilinx 1217583219 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_fifo_64.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_fifo_64 1217583218 CP pl4_async_burst_fifo
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/pl4_lite_src_io 1217583256 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131 \
      PB pl4_lite_v4_2/rlocs 1217583137
AR pl4_lite_v4_2/pl4_lite_src_io/xilinx 1217583257 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_io 1217583256 CP ODDR CP FDDRRSE CP OBUFTDS \
      CP pl4_lite_src_io_ddr1 CP pl4_lite_src_io_ddr0
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ce.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_io_ce 1217583250 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ce.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/rlocs 1217583137
AR pl4_lite_v4_2/pl4_lite_src_io_ce/xilinx 1217583251 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ce.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_io_ce 1217583250 CP LUT3 CP FDR_1 CP LUT1 CP FDR \
      CP LD
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ddr0.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/pl4_lite_src_io_ddr0 1217583252 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ddr0.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/rlocs 1217583137
AR pl4_lite_v4_2/pl4_lite_src_io_ddr0/xilinx 1217583253 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ddr0.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_io_ddr0 1217583252 CP FDR CP ODDR CP FDDRRSE \
      CP OBUFTDS
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ddr1.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/pl4_lite_src_io_ddr1 1217583254 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ddr1.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/rlocs 1217583137
AR pl4_lite_v4_2/pl4_lite_src_io_ddr1/xilinx 1217583255 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_io_ddr1.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_io_ddr1 1217583254 CP FDS CP ODDR CP FDDRRSE \
      CP OBUFTDS
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_reset.vhd 2008/08/01.17:31:20 J.36
EN pl4_lite_v4_2/pl4_lite_src_reset 1217583200 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_reset.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_reset/xilinx 1217583201 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_reset.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_reset 1217583200 CP pl4_lite_sync_fifo_reset \
      CP pl4_lite_sync_reset
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_synchronizer.vhd 2008/08/01.17:31:20 J.36
EN pl4_lite_v4_2/pl4_lite_src_synchronizer 1217583202 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_synchronizer.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_synchronizer/xilinx 1217583203 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_synchronizer.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_synchronizer 1217583202 CP pl4_lite_sync_it \
      CP pl4_lite_sync_1shot_rising
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_master_addr.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/pl4_lite_src_top_master_addr 1217583260 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_master_addr.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576
AR pl4_lite_v4_2/pl4_lite_src_top_master_addr/xilinx 1217583261 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_master_addr.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_top_master_addr 1217583260 \
      CP pl4_lite_src_reset CP pl4_lite_src_synchronizer CP pl4_lite_src_io \
      CP pl4_lite_src_clk CP pl4_lite_src_core CP pl4_lite_src_core_64 \
      CP pl4_lite_src_cal
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_master_trans.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/pl4_lite_src_top_master_trans 1217583262 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_master_trans.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576
AR pl4_lite_v4_2/pl4_lite_src_top_master_trans/xilinx 1217583263 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_master_trans.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_top_master_trans 1217583262 \
      CP pl4_lite_src_reset CP pl4_lite_src_synchronizer CP pl4_lite_src_io \
      CP pl4_lite_src_clk CP pl4_lite_src_core CP pl4_lite_src_core_64 \
      CP pl4_lite_src_cal_trns
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_slave_addr.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/pl4_lite_src_top_slave_addr 1217583264 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_slave_addr.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576
AR pl4_lite_v4_2/pl4_lite_src_top_slave_addr/xilinx 1217583265 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_slave_addr.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_top_slave_addr 1217583264 \
      CP pl4_lite_src_reset CP pl4_lite_src_synchronizer CP pl4_lite_src_io \
      CP pl4_lite_src_core CP pl4_lite_src_core_64 CP pl4_lite_src_cal
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_slave_trans.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/pl4_lite_src_top_slave_trans 1217583266 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_slave_trans.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576
AR pl4_lite_v4_2/pl4_lite_src_top_slave_trans/xilinx 1217583267 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_top_slave_trans.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_top_slave_trans 1217583266 \
      CP pl4_lite_src_reset CP pl4_lite_src_synchronizer CP pl4_lite_src_io \
      CP pl4_lite_src_core CP pl4_lite_src_core_64 CP pl4_lite_src_cal_trns
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_train_create.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_train_create 1217583244 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_train_create.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576 LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_train_create/xilinx 1217583245 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_train_create.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_train_create 1217583244
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_write.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_write 1217583232 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_write.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576 LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_write/xilinx 1217583233 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_write.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_write 1217583232 CP crc
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_write_64.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_write_64 1217583234 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_write_64.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576 LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_write_64/xilinx 1217583235 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_write_64.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_write_64 1217583234 CP crc
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/uart232_pl4_lite_snk_top.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/uart232_pl4_lite_snk_top 1217583268 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/uart232_pl4_lite_snk_top.vhd \
      PB ieee/std_logic_1164 1177545575
AR pl4_lite_v4_2/uart232_pl4_lite_snk_top/spartan3e 1217583269 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/uart232_pl4_lite_snk_top.vhd \
      EN pl4_lite_v4_2/uart232_pl4_lite_snk_top 1217583268 CP pl4_lite_snk_top