hdpdeps.ref

spi接口的vhdl实现

EN pl4_lite_v4_2/pl4_async_burst_fifo_ram 1217583206 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_ram.vhd \
      PB ieee/std_logic_1164 1177545575
AR pl4_lite_v4_2/pl4_async_burst_fifo_ram/gates 1217583207 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_ram.vhd \
      EN pl4_lite_v4_2/pl4_async_burst_fifo_ram 1217583206 CP RAM16X1D \
      CP RAMB16_S36_S36 CP RAMB16_S18_S18 CP RAMB16_S9_S9 CP RAMB16_S4_S4 \
      CP RAMB16_S2_S2 CP RAMB16_S1_S1
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_ram_v5.vhd 2008/08/01.17:31:20 J.36
EN pl4_lite_v4_2/pl4_async_burst_fifo_ram_v5 1217583208 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_ram_v5.vhd \
      PB ieee/std_logic_1164 1177545575 LB unisim PH unisim/VCOMPONENTS 1177545586
AR pl4_lite_v4_2/pl4_async_burst_fifo_ram_v5/gates 1217583209 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_ram_v5.vhd \
      EN pl4_lite_v4_2/pl4_async_burst_fifo_ram_v5 1217583208 CP RAMB18SDP
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_rd.vhd 2008/08/01.17:31:20 J.36
EN pl4_lite_v4_2/pl4_async_burst_fifo_rd 1217583210 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_rd.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/std_logic_arith 1177545576 \
      PB ieee/STD_LOGIC_UNSIGNED 1177545583 PB ieee/std_logic_misc 1177545582 \
      LB pl4_lite_v4_2 PB pl4_lite_v4_2/generic_fifo_pkg 1217583135
AR pl4_lite_v4_2/pl4_async_burst_fifo_rd/xilinx 1217583211 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_rd.vhd \
      EN pl4_lite_v4_2/pl4_async_burst_fifo_rd 1217583210
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_reg_gray.vhd 2008/08/01.17:31:20 J.36
EN pl4_lite_v4_2/pl4_async_burst_fifo_reg_gray 1217583204 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_reg_gray.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/rlocs 1217583137
AR pl4_lite_v4_2/pl4_async_burst_fifo_reg_gray/xilinx 1217583205 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_reg_gray.vhd \
      EN pl4_lite_v4_2/pl4_async_burst_fifo_reg_gray 1217583204 CP integer \
      CP string CP label CP FDC
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_wr.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_async_burst_fifo_wr 1217583212 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_wr.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/std_logic_arith 1177545576 \
      PB ieee/STD_LOGIC_UNSIGNED 1177545583 PB ieee/std_logic_misc 1177545582 \
      LB pl4_lite_v4_2 PB pl4_lite_v4_2/generic_fifo_pkg 1217583135
AR pl4_lite_v4_2/pl4_async_burst_fifo_wr/xilinx 1217583213 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_async_burst_fifo_wr.vhd \
      EN pl4_lite_v4_2/pl4_async_burst_fifo_wr 1217583212
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_cal 1217583230 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal.vhd \
      PB ieee/std_logic_1164 1177545575
AR pl4_lite_v4_2/pl4_lite_src_cal/xilinx 1217583231 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_cal 1217583230 CP FD CP pl4_lite_src_cal_proc \
      CP pl4_lite_src_cal_dip2 CP pl4_lite_src_cal_fifo CP pl4_lite_dpmsrsw_cal_v5 \
      CP pl4_lite_dpmsrsw_cal
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_dip2.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_cal_dip2 1217583220 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_dip2.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_cal_dip2/xilinx 1217583221 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_dip2.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_cal_dip2 1217583220
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_fifo.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_cal_fifo 1217583222 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_fifo.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576
AR pl4_lite_v4_2/pl4_lite_src_cal_fifo/xilinx 1217583223 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_fifo.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_cal_fifo 1217583222 CP RAM16X1D \
      CP pl4_lite_sync_it CP label CP FDR CP FDS
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_fifo_trns.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_cal_fifo_trns 1217583224 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_fifo_trns.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576
AR pl4_lite_v4_2/pl4_lite_src_cal_fifo_trns/xilinx 1217583225 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_fifo_trns.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_cal_fifo_trns 1217583224
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_proc.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_cal_proc 1217583226 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_proc.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      PB ieee/std_logic_arith 1177545576
AR pl4_lite_v4_2/pl4_lite_src_cal_proc/xilinx 1217583227 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_proc.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_cal_proc 1217583226
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_trns.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_cal_trns 1217583228 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_trns.vhd \
      PB ieee/std_logic_1164 1177545575
AR pl4_lite_v4_2/pl4_lite_src_cal_trns/xilinx 1217583229 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_cal_trns.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_cal_trns 1217583228 CP FD \
      CP pl4_lite_src_cal_proc CP pl4_lite_src_cal_dip2 \
      CP pl4_lite_src_cal_fifo_trns CP pl4_lite_dpmsrsw_cal_v5 \
      CP pl4_lite_dpmsrsw_cal
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_clk.vhd 2008/08/01.17:31:24 J.36
EN pl4_lite_v4_2/pl4_lite_src_clk 1217583258 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_clk.vhd \
      PB ieee/std_logic_1164 1177545575
AR pl4_lite_v4_2/pl4_lite_src_clk/xilinx 1217583259 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_clk.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_clk 1217583258 CP IBUFGDS CP BUFG CP DCM CP FDR \
      CP IBUFDS CP BUFIO CP BUFR
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_core.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_core 1217583246 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_core.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_core/xilinx 1217583247 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_core.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_core 1217583246 CP pl4_lite_src_write \
      CP pl4_lite_src_fifo CP pl4_lite_src_train_create CP pl4_lite_src_data
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_core_64.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_core_64 1217583248 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_core_64.vhd \
      PB ieee/std_logic_1164 1177545575 LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_core_64/xilinx 1217583249 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_core_64.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_core_64 1217583248 CP pl4_lite_src_write_64 \
      CP pl4_lite_src_fifo_64 CP pl4_lite_src_train_create CP pl4_lite_src_data
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_data 1217583242 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/std_logic_arith 1177545576
AR pl4_lite_v4_2/pl4_lite_src_data/xilinx 1217583243 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_data 1217583242 CP pl4_lite_src_data_payload \
      CP pl4_lite_src_data_barrel CP pl4_lite_src_data_dip4 CP crc
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_barrel.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_data_barrel 1217583238 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_barrel.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/STD_LOGIC_UNSIGNED 1177545583 \
      LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_data_barrel/xilinx 1217583239 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_barrel.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_data_barrel 1217583238
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_dip4.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_data_dip4 1217583240 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_dip4.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/std_logic_arith 1177545576 \
      PB ieee/STD_LOGIC_UNSIGNED 1177545583 PB ieee/std_logic_misc 1177545582 \
      LB pl4_lite_v4_2 PB pl4_lite_v4_2/pl4_pkg 1217583131
AR pl4_lite_v4_2/pl4_lite_src_data_dip4/xilinx 1217583241 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_dip4.vhd \
      EN pl4_lite_v4_2/pl4_lite_src_data_dip4 1217583240
FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_payload.vhd 2008/08/01.17:31:22 J.36
EN pl4_lite_v4_2/pl4_lite_src_data_payload 1217583236 \
      FL F:/hawaii_f/ise/spi/spi_controller/tmp/_cg/_bbx/pl4_lite_v4_2/src/pl4_lite_src_data_payload.vhd \
      PB ieee/std_logic_1164 1177545575 PB ieee/std_logic_arith 1177545576 \
      PB ieee/STD_LOGIC_UNSIGNED 1177545583 PB ieee/std_logic_misc 1177545582 \