nios2e_2c35.ptf.bak

MagicSopc DDR-Sdram

            }
            PORT jtag_debug_module_clk
            {
               Is_Enabled = "1";
               direction = "input";
               type = "clk";
               width = "1";
            }
            PORT jtag_debug_module_debugaccess
            {
               Is_Enabled = "1";
               direction = "input";
               type = "debugaccess";
               width = "1";
            }
            PORT jtag_debug_module_readdata
            {
               Is_Enabled = "1";
               direction = "output";
               type = "readdata";
               width = "32";
            }
            PORT jtag_debug_module_reset
            {
               Is_Enabled = "1";
               direction = "input";
               type = "reset";
               width = "1";
            }
            PORT jtag_debug_module_resetrequest
            {
               Is_Enabled = "1";
               direction = "output";
               type = "resetrequest";
               width = "1";
            }
            PORT jtag_debug_module_select
            {
               Is_Enabled = "1";
               direction = "input";
               type = "chipselect";
               width = "1";
            }
            PORT jtag_debug_module_write
            {
               Is_Enabled = "1";
               direction = "input";
               type = "write";
               width = "1";
            }
            PORT jtag_debug_module_writedata
            {
               Is_Enabled = "1";
               direction = "input";
               type = "writedata";
               width = "32";
            }
            PORT reset_n
            {
               Is_Enabled = "1";
               direction = "input";
               type = "reset_n";
               width = "1";
            }
         }
         SYSTEM_BUILDER_INFO 
         {
            Read_Wait_States = "1";
            Write_Wait_States = "1";
            Register_Incoming_Signals = "1";
            Bus_Type = "avalon";
            Data_Width = "32";
            Address_Width = "9";
            Accepts_Internal_Connections = "1";
            Requires_Internal_Connections = "instruction_master,data_master";
            Accepts_External_Connections = "0";
            Is_Enabled = "1";
            Address_Alignment = "dynamic";
            Base_Address = "0x00000000";
            Is_Memory_Device = "1";
            Is_Readable = "1";
            Is_Writeable = "1";
            Is_Printable_Device = "0";
            Is_Big_Endian = "0";
            Uses_Tri_State_Data_Bus = "0";
            Has_IRQ = "0";
            JTAG_Hub_Base_Id = "1118278";
            JTAG_Hub_Instance_Id = "0";
            MASTERED_BY cpu/instruction_master
            {
               priority = "1";
            }
            MASTERED_BY cpu/data_master
            {
               priority = "1";
            }
            Address_Group = "0";
            IRQ_MASTER cpu/data_master
            {
               IRQ_Number = "NC";
            }
         }
      }
      PORT_WIRING 
      {
         PORT jtag_debug_trigout
         {
            width = "1";
            direction = "output";
            Is_Enabled = "0";
         }
         PORT jtag_debug_offchip_trace_clk
         {
            width = "1";
            direction = "output";
            Is_Enabled = "0";
         }
         PORT jtag_debug_offchip_trace_data
         {
            width = "18";
            direction = "output";
            Is_Enabled = "0";
         }
         PORT clkx2
         {
            width = "1";
            direction = "input";
            Is_Enabled = "0";
            visible = "0";
         }
      }
      WIZARD_SCRIPT_ARGUMENTS 
      {
         asp_debug = "0";
         asp_core_debug = "0";
         CPU_Architecture = "nios2";
         do_generate = "1";
         cpu_selection = "e";
         CPU_Implementation = "tiny";
         gui_include_tightly_coupled_instruction_masters = "0";
         gui_num_tightly_coupled_instruction_masters = "1";
         gui_omit_avalon_data_master = "0";
         gui_include_tightly_coupled_data_masters = "0";
         gui_num_tightly_coupled_data_masters = "1";
         num_tightly_coupled_instruction_masters = "0";
         num_tightly_coupled_data_masters = "0";
         cache_has_dcache = "0";
         cache_has_icache = "0";
         cache_dcache_size = "2048";
         cache_icache_size = "4096";
         cache_dcache_line_size = "4";
         cache_icache_line_size = "32";
         cache_dcache_bursts = "0";
         cache_icache_bursts = "0";
         cache_icache_burst_type = "none";
         cache_dcache_ram_block_type = "AUTO";
         cache_icache_ram_block_type = "AUTO";
         include_debug = "0";
         include_trace = "0";
         include_oci = "1";
         include_third_party_debug_port = "0";
         debug_level = "2";
         oci_offchip_trace = "0";
         oci_onchip_trace = "0";
         oci_data_trace = "0";
         oci_trace_addr_width = "7";
         oci_num_xbrk = "0";
         oci_num_dbrk = "0";
         oci_dbrk_trace = "0";
         oci_dbrk_pairs = "0";
         oci_num_pm = "0";
         oci_pm_width = "40";
         oci_debugreq_signals = "0";
         oci_trigger_arming = "1";
         oci_embedded_pll = "1";
         hardware_multiply_present = "0";
         hardware_divide_present = "0";
         gui_hardware_multiply_setting = "embedded_mul_fast_le_shift";
         hardware_multiply_uses_les = "0";
         hardware_multiply_omits_msw = "1";
         hardware_multiply_impl = "embedded_mul";
         gui_hardware_divide_setting = "0";
         cpu_reset = "0";
         export_pcb = "0";
         big_endian = "0";
         reset_slave = "ddr_sdram/s1";
         reset_offset = "0x00000000";
         exc_slave = "ddr_sdram/s1";
         exc_offset = "0x00000020";
         break_slave = "cpu/jtag_debug_module";
         break_offset = "0x00000020";
         break_slave_override = "";
         break_offset_override = "0x20";
         legacy_sdk_support = "0";
         altera_show_unreleased_features = "0";
         altera_show_unpublished_features = "0";
         altera_internal_test = "0";
         alt_log_port_base = "";
         alt_log_port_type = "";
         dont_overwrite_cpuid = "0";
         full_waveform_signals = "0";
         gui_illegal_instructions_trap = "0";
         illegal_instructions_trap = "0";
         gui_illegal_memory_access_detection = "0";
         illegal_memory_access_detection = "0";
         gui_branch_prediction_type = "Automatic";
         branch_prediction_type = "Dynamic";
         bht_ptr_sz = "8";
         bht_index_pc_only = "0";
         shift_rot_impl = "fast_le_shift";
         gui_mmu_present = "0";
         mmu_present = "0";
         process_id_num_bits = "10";
         dtlb_ptr_sz = "7";
         dtlb_num_ways = "4";
         udtlb_num_entries = "6";
         itlb_ptr_sz = "7";
         itlb_num_ways = "4";
         uitlb_num_entries = "4";
         fast_tlb_miss_exc_slave = "";
         fast_tlb_miss_exc_offset = "0x0";
         cache_omit_dcache = "0";
         cache_omit_icache = "0";
         omit_instruction_master = "0";
         omit_data_master = "0";
         performance_counters_present = "0";
         performance_counters_width = "32";
         ras_ptr_sz = "4";
         jtb_ptr_sz = "5";
         ibuf_ptr_sz = "4";
         always_encrypt = "1";
         debug_simgen = "0";
         activate_model_checker = "0";
         activate_monitors = "1";
         activate_test_end_checker = "0";
         activate_trace = "1";
         clear_x_bits_ld_non_bypass = "1";
         bit_31_bypass_dcache = "1";
         always_bypass_dcache = "0";
         hdl_sim_caches_cleared = "1";
         consistent_synthesis = "0";
         hbreak_test = "0";
         allow_full_address_range = "0";
         allow_legacy_sdk = "0";
         iss_trace_on = "0";
         iss_trace_warning = "1";
         iss_trace_info = "1";
         iss_trace_disassembly = "0";
         iss_trace_registers = "0";
         iss_trace_instr_count = "0";
         iss_software_debug = "0";
         iss_software_debug_port = "9996";
         iss_memory_dump_start = "";
         iss_memory_dump_end = "";
         Boot_Copier = "boot_loader_cfi.srec";
         Boot_Copier_EPCS = "boot_loader_epcs.srec";
         Boot_Copier_EPCS_Stratix_II = "boot_loader_epcs_stratix_ii.srec";
         Boot_Copier_BE = "boot_loader_cfi_be.srec";
         Boot_Copier_EPCS_BE = "boot_loader_epcs_be.srec";
         Boot_Copier_EPCS_Stratix_II_BE = "boot_loader_epcs_stratix_ii_be.srec";
         CONSTANTS 
         {
            CONSTANT __nios_catch_irqs__
            {
               value = "1";
               comment = "Include panic handler for all irqs (needs uart)";
            }
            CONSTANT __nios_use_constructors__
            {
               value = "1";
               comment = "Call c++ static constructors";
            }
            CONSTANT __nios_use_small_printf__
            {
               value = "1";
               comment = "Smaller non-ANSI printf, with no floating point";
            }
            CONSTANT nasys_has_icache
            {
               value = "0";
               comment = "True if instruction cache present";
            }
            CONSTANT nasys_icache_size
            {
               value = "4096";
               comment = "Size in bytes of instruction cache";
            }
            CONSTANT nasys_icache_line_size
            {
               value = "32";
               comment = "Size in bytes of each icache line";
            }
            CONSTANT nasys_icache_line_size_log2
            {
               value = "5";
               comment = "Log2 size in bytes of each icache line";
            }
            CONSTANT nasys_has_dcache
            {
               value = "0";
               comment = "True if instruction cache present";
            }
            CONSTANT nasys_dcache_size
            {
               value = "2048";
               comment = "Size in bytes of data cache";
            }
            CONSTANT nasys_dcache_line_size
            {
               value = "4";
               comment = "Size in bytes of each dcache line";
            }
            CONSTANT nasys_dcache_line_size_log2
            {
               value = "2";
               comment = "Log2 size in bytes of each dcache line";
            }
         }
         license_status = "encrypted";
         germs_monitor_id = "";
         cpuid_sz = "1";
         cpuid_value = "0";
      }
      SYSTEM_BUILDER_INFO 
      {
         Parameters_Signature = "";
         Is_CPU = "1";
         Is_Enabled = "1";
         Instantiate_In_System_Module = "1";
         Required_Device_Family = "STRATIX,STRATIXGX,STRATIXII,STRATIXIIGX,STRATIXIII,CYCLONE,CYCLONEII,CYCLONEIII";
         Default_Module_Name = "cpu";
         Top_Level_Ports_Are_Enumerated = "1";
         Clock_Source = "clk";
         View 
         {
            MESSAGES 
            {
            }
            Is_Collapsed = "0";
            Settings_Summary = "Nios II/e
            
            
            <br>&nbsp;&nbsp;JTAG Debug Module
            ";
         }
      }
      SIMULATION 
      {
         DISPLAY 
         {
            SIGNAL aaa
            {
               format = "Logic";
               name = "d_irq";
               radix = "hexadecimal";
            }
            SIGNAL aab
            {
               format = "Logic";
               name = "d_waitrequest";
               radix = "hexadecimal";
            }
            SIGNAL aac
            {
               format = "Logic";
               name = "d_address";
               radix = "hexadecimal";
            }
            SIGNAL aad
            {
               format = "Logic";
               name = "d_byteenable";
               radix = "hexadecimal";
            }
            SIGNAL aae
            {
               format = "Logic";
               name = "d_read";
               radix = "hexadecimal";
            }
            SIGNAL aaf
            {
               format = "Logic";
               name = "d_readdata";
               radix = "hexadecimal";
            }
            SIGNAL aag
            {
               format = "Logic";
               name = "d_write";
               radix = "hexadecimal";
            }
            SIGNAL aah
            {
               format = "Logic";
               name = "d_writedata";
               radix = "hexadecimal";
            }
            SIGNAL aai
            {
               format = "Logic";
               name = "i_waitrequest";
               radix = "hexadecimal";
            }
            SIGNAL aaj
            {
               format = "Logic";
               name = "i_address";
               radix = "hexadecimal";
            }
            SIGNAL aak
            {
               format = "Logic";
               name = "i_read";
               radix = "hexadecimal";
            }
            SIGNAL aal
            {
               format = "Logic";
               name = "i_readdata";
               radix = "hexadecimal";
            }
            SIGNAL aam
            {
               format = "Divider";
               name = "common";
               radix = "";
            }
            SIGNAL aan
            {
               format = "Logic";
               name = "clk";
               radix = "hexadecimal";
            }
            SIGNAL aao
            {
               format = "Logic";
               name = "reset_n";
               radix = "hexadecimal";
            }
            SIGNAL aap
            {