📄 89lv51.lst
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C51 COMPILER V8.05a 89LV51 06/18/2008 21:31:17 PAGE 1
C51 COMPILER V8.05a, COMPILATION OF MODULE 89LV51
OBJECT MODULE PLACED IN 89lv51.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE 89lv51.c BROWSE INCDIR(D:\BAO\copy\24L01\新版24L01\source code new\24L01 so
-urce code\) DEBUG OBJECTEXTEND
line level source
1 #include <reg51.h>
2 #include <intrins.h>
3 #include "api.h"
4 /*
5 *This file is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTYT;
6 *
7 *uart:19200BPS
8 *****************
9 * 官方网址: http://www.tianyi-dz.com
10 * 官方论坛: http://www.tianyi-dz.com/bbs
11 ****************
12 ***TY Tech**
13 ***bai chun yu **
14 ***qq:472230383 328997835 **
15 ***Email:baichunyu1232000@163.com **
16 ****************
17 */
18 /***************************************************/
19 #define uchar unsigned char
20 #define TX_ADR_WIDTH 5 // 5 bytes TX(RX) address width
21 #define TX_PLOAD_WIDTH 20 // 20 bytes TX payload
22
23 uchar const TX_ADDRESS[TX_ADR_WIDTH] = {0x34,0x43,0x10,0x10,0x01}; // Define a static TX address
24
25 uchar rx_buf[TX_PLOAD_WIDTH];
26 uchar tx_buf[TX_PLOAD_WIDTH];
27 uchar flag;
28 /**************************************************/
29 sbit CE = P1^0;
30 sbit CSN= P1^1;
31 sbit SCK= P1^2;
32 sbit MOSI= P1^3;
33 sbit MISO= P1^4;
34 sbit IRQ = P1^5;
35 /**************************************************/
36 uchar bdata sta;
37 sbit RX_DR =sta^6;
38 sbit TX_DS =sta^5;
39 sbit MAX_RT =sta^4;
40 /**************************************************/
41
42 /**************************************************
43 Function: init_io();
44 Description:
45 flash led one time,chip enable(ready to TX or RX Mode),
46 Spi disable,Spi clock line init high
47 /**************************************************/
48 #define KEY 0xaa
49 void init_io(void)
50 {
51 1 P0=KEY; // led light
52 1 CE=0; // chip enable
53 1 CSN=1; // Spi disable
54 1 SCK=0; // Spi clock line init high
C51 COMPILER V8.05a 89LV51 06/18/2008 21:31:17 PAGE 2
55 1 P0=0xff; // led close
56 1 }
57 /**************************************************/
58
59 /**************************************************
60 Function: Inituart();
61
62 Description:
63 set uart working mode
64 /**************************************************/
65 void Inituart(void)
66 {
67 1 TMOD = 0x20; //timer1 working mode 1
68 1 TL1 = 0xfd; //f7=9600 for 16mhz Fosc,and ...
69 1 TH1 = 0xfd; //...fd=19200 for 11.0592mhz Fosc
70 1 SCON = 0xd8; //uart mode 3,ren==1
71 1 PCON = 0x80; //smod=0
72 1 TR1 = 1; //start timer1
73 1 }
74 /**************************************************/
75
76 /**************************************************
77 Function: init_int0();
78
79 Description:
80 enable int0 interrupt;
81 /**************************************************/
82 void init_int0(void)
83 {
84 1 EA=1;
85 1 EX0=1; // Enable int0 interrupt.
86 1 }
87 /**************************************************/
88
89 /**************************************************/
90 void delay_ms(unsigned int x)
91 {
92 1 unsigned int i,j;
93 1 i=0;
94 1 for(i=0;i<x;i++)
95 1 {
96 2 j=108;
97 2 ;
98 2 while(j--);
99 2 }
100 1 }
101 /**************************************************/
102
103 /**************************************************
104 Function: SPI_RW();
105
106 Description:
107 Writes one byte to nRF24L01, and return the byte read
108 from nRF24L01 during write, according to SPI protocol
109 /**************************************************/
110 uchar SPI_RW(uchar byte)
111 {
112 1 uchar bit_ctr;
113 1 for(bit_ctr=0;bit_ctr<8;bit_ctr++) // output 8-bit
114 1 {
115 2 MOSI = (byte & 0x80); // output 'byte', MSB to MOSI
116 2 byte = (byte << 1); // shift next bit into MSB..
C51 COMPILER V8.05a 89LV51 06/18/2008 21:31:17 PAGE 3
117 2 SCK = 1; // Set SCK high..
118 2 byte |= MISO; // capture current MISO bit
119 2 SCK = 0; // ..then set SCK low again
120 2 }
121 1 return(byte); // return read byte
122 1 }
123 /**************************************************/
124
125 /**************************************************
126 Function: SPI_RW_Reg();
127
128 Description:
129 Writes value 'value' to register 'reg'
130 /**************************************************/
131 uchar SPI_RW_Reg(BYTE reg, BYTE value)
132 {
133 1 uchar status;
134 1
135 1 CSN = 0; // CSN low, init SPI transaction
136 1 status = SPI_RW(reg); // select register
137 1 SPI_RW(value); // ..and write value to it..
138 1 CSN = 1; // CSN high again
139 1
140 1 return(status); // return nRF24L01 status byte
141 1 }
142 /**************************************************/
143
144 /**************************************************
145 Function: SPI_Read();
146
147 Description:
148 Read one byte from nRF24L01 register, 'reg'
149 /**************************************************/
150 BYTE SPI_Read(BYTE reg)
151 {
152 1 BYTE reg_val;
153 1
154 1 CSN = 0; // CSN low, initialize SPI communication...
155 1 SPI_RW(reg); // Select register to read from..
156 1 reg_val = SPI_RW(0); // ..then read registervalue
157 1 CSN = 1; // CSN high, terminate SPI communication
158 1
159 1 return(reg_val); // return register value
160 1 }
161 /**************************************************/
162
163 /**************************************************
164 Function: SPI_Read_Buf();
165
166 Description:
167 Reads 'bytes' #of bytes from register 'reg'
168 Typically used to read RX payload, Rx/Tx address
169 /**************************************************/
170 uchar SPI_Read_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
171 {
172 1 uchar status,byte_ctr;
173 1
174 1 CSN = 0; // Set CSN low, init SPI tranaction
175 1 status = SPI_RW(reg); // Select register to write to and read status byte
176 1
177 1 for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
178 1 pBuf[byte_ctr] = SPI_RW(0); // Perform SPI_RW to read byte from nRF24L01
C51 COMPILER V8.05a 89LV51 06/18/2008 21:31:17 PAGE 4
179 1
180 1 CSN = 1; // Set CSN high again
181 1
182 1 return(status); // return nRF24L01 status byte
183 1 }
184 /**************************************************/
185
186 /**************************************************
187 Function: SPI_Write_Buf();
188
189 Description:
190 Writes contents of buffer '*pBuf' to nRF24L01
191 Typically used to write TX payload, Rx/Tx address
192 /**************************************************/
193 uchar SPI_Write_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
194 {
195 1 uchar status,byte_ctr;
196 1
197 1 CSN = 0; // Set CSN low, init SPI tranaction
198 1 status = SPI_RW(reg); // Select register to write to and read status byte
199 1 for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
200 1 SPI_RW(*pBuf++);
201 1 CSN = 1; // Set CSN high again
202 1 return(status); // return nRF24L01 status byte
203 1 }
204 /**************************************************/
205
206 /**************************************************
207 Function: RX_Mode();
208
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